Travelled to:1 × United Kingdom
2 × USA
Collaborated with:Z.Barzilai L.M.Huisman S.Weiss I.Y.Spillinger K.Ebcioglu R.D.Groves K.Kim I.Ziv D.K.Beece V.S.Iyengar D.T.Tang L.S.Woo
Talks about:simul (3) superscalar (1) architectur (1) transistor (1) techniqu (1) process (1) environ (1) coverag (1) circuit (1) analysi (1)
Person: Gabriel M. Silberman
DBLP: Silberman:Gabriel_M=
Contributed to:
1994
1989
19861983Wrote 4 papers:
- PLDI-1994-EbciogluGKSZ #compilation
- VLIW Compilation Techniques in a Superscalar Environment (KE, RDG, KCK, GMS, IZ), pp. 36–48.
- FPCA-1989-WeissSS #architecture #array #data-driven
- Architectural Improvements for Data-Driven VLSI Processing Arrays (SW, IYS, GMS), pp. 243–259.
- DAC-1986-BarzilaiBHIS #analysis #fault #named #performance #verification
- SLS — a fast switch level simulator for verification and fault coverage analysis (ZB, DKB, LMH, VSI, GMS), pp. 164–170.
- DAC-1983-BarzilaiHSTW #logic #simulation #using
- Simulating pass transistor circuits using logic simulation machines (ZB, LMH, GMS, DTT, LSW), pp. 157–163.