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Travelled to:
1 × Canada
3 × USA
Collaborated with:
C.Apté T.Zhang L.Trevillyan P.Bose Z.Barzilai D.K.Beece L.M.Huisman G.M.Silberman
Talks about:
constraint (1) transform (1) processor (1) satisfi (1) resampl (1) privaci (1) infinit (1) coverag (1) cluster (1) analysi (1)

Person: Vijay S. Iyengar

DBLP DBLP: Iyengar:Vijay_S=

Contributed to:

KDD 20042004
KDD 20022002
KDD 20002000
HPCA 19961996
DAC 19861986

Wrote 5 papers:

KDD-2004-Iyengar #clustering #detection #on the
On detecting space-time clusters (VSI), pp. 587–592.
KDD-2002-Iyengar #constraints #privacy
Transforming data to satisfy privacy constraints (VSI), pp. 279–288.
KDD-2000-IyengarAZ #adaptation #learning #using
Active learning using adaptive resampling (VSI, CA, TZ), pp. 91–98.
HPCA-1996-IyengarTB #infinity #modelling
Representative Traces for Processor Models with Infinite Cache (VSI, LT, PB), pp. 62–72.
DAC-1986-BarzilaiBHIS #analysis #fault #named #performance #verification
SLS — a fast switch level simulator for verification and fault coverage analysis (ZB, DKB, LMH, VSI, GMS), pp. 164–170.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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