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Travelled to:
1 × Cyprus
2 × France
2 × Germany
2 × USA
Collaborated with:
M.Kondo T.Mishima T.Nanya Y.Kukimoto M.Fujita H.Tanaka R.Watanabe M.Imai D.Komura S.Tsutsumi H.Aburatani S.Ihara E.Kim H.Saito J.Lee D.Lee H.Noguchi K.Nomura K.Abe S.Fujita E.Arima K.Kim T.Nakada S.Miwa H.Kobayashi R.Sakamoto M.Wada J.Tsukamoto M.Namiki W.Wang H.Amano K.Matsunaga M.Kudo K.Usami T.Komoda
Talks about:
databas (2) regist (2) energi (2) under (2) power (2) unit (2) mram (2) data (2) multidimension (1) microprocessor (1)

Person: Hiroshi Nakamura

DBLP DBLP: Nakamura:Hiroshi

Contributed to:

DATE 20142014
DATE 20132013
VLDB 20092009
DATE 20072007
HPCA 20052005
SAC 20042004
DATE 20032003
CAV 19901990

Wrote 8 papers:

DATE-2014-KondoKSWTNWAMKUKN #design #embedded #evaluation #fine-grained
Design and evaluation of fine-grained power-gating for embedded microprocessors (MK, HK, RS, MW, JT, MN, WW, HA, KM, MK, KU, TK, HN), pp. 1–6.
DATE-2013-NoguchiNAFAKNMN #energy #hybrid #memory management #performance
D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory (HN, KN, KA, SF, EA, KK, TN, SM, HN), pp. 1813–1818.
VLDB-2009-MishimaN #database #middleware #named #replication
Pangea: An Eager Database Replication Middleware guaranteeing Snapshot Isolation without Modification of Database Servers (TM, HN), pp. 1066–1077.
DATE-2007-WatanabeKINN #constraints #energy #interactive #multi #performance #scheduling
Interactive presentation: Task scheduling under performance constraints for reducing the energy consumption of the GALS multi-processor SoC (RW, MK, MI, HN, TN), pp. 797–802.
HPCA-2005-KondoN #clustering #performance #power management
A Small, Fast and Low-Power Register File by Bit-Partitioning (MK, HN), pp. 40–49.
SAC-2004-KomuraNTAI #multi #visualisation
Multidimensional support vector machines for visualization of gene expression data (DK, HN, ST, HA, SI), pp. 175–179.
DATE-2003-KimSLLNN #data flow #distributed #graph
Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units (EK, HS, JGL, DIL, HN, TN), pp. 10276–10281.
CAV-1990-NakamuraKFT #logic #using #verification
A Data Path Verifier for Register Transfer Level Using Temporal Logic Language Tokio (HN, YK, MF, HT), pp. 76–85.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.