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Travelled to:
1 × Germany
3 × France
5 × USA
Collaborated with:
T.A.El-Moselhy L.Yu D.A.Antoniadis D.S.Boning D.D.Ling S.Saxena C.Hess R.Marculescu D.Atienza B.Dewey D.Widiger L.Wei A.Deutsch G.V.Kopcsay B.Rubin H.Smith L.M.Silveira J.White M.Chilukuri K.S.Kundert A.R.Conn W.W.Molzen P.R.O'Brien P.N.Strenski C.Visweswariah C.B.Whan
Talks about:
effici (4) model (3) use (3) character (2) algorithm (2) statist (2) paramet (2) sensit (2) estim (2) chip (2)

Person: Ibrahim M. Elfadel

DBLP DBLP: Elfadel:Ibrahim_M=

Contributed to:

DATE 20152015
DATE 20142014
DATE 20132013
DAC 20092009
DAC 20082008
DATE DF 20042004
DAC 19991999
DAC 19971997
DAC 19941994

Wrote 10 papers:

DATE-2015-YuSHEAB #library #multi #statistics #using
Statistical library characterization using belief propagation across multiple technology nodes (LY, SS, CH, IME, DAA, DSB), pp. 1383–1388.
DATE-2014-YuSHEAB #estimation #performance #physics
Efficient performance estimation with very small sample size via physical subspace projection and maximum a posteriori estimation (LY, SS, CH, IME, DAA, DSB), pp. 1–6.
DATE-2013-ElfadelMA #formal method #industrial #manycore
Closed-loop control for power and thermal management in multi-core processors: formal methods and industrial practice (IME, RM, DA), pp. 1879–1881.
DATE-2013-YuWAEB #modelling #statistics
Statistical modeling with the virtual source MOSFET model (LY, LW, DAA, IME, DSB), pp. 1454–1457.
DAC-2009-El-MoselhyED #algorithm #performance
An efficient resistance sensitivity extraction algorithm for conductors of arbitrary shapes (TAEM, IME, BD), pp. 770–775.
DAC-2008-El-MoselhyEW #algorithm #parametricity #performance #scalability #set
Efficient algorithm for the computation of on-chip capacitance sensitivities with respect to a large set of parameters (TAEM, IME, DW), pp. 906–911.
DATE-DF-2004-ElfadelDKRS
A CAD Methodology and Tool for the Characterization of Wide On-Chip Buses (IME, AD, GVK, BR, HS), pp. 144–149.
DAC-1999-ConnEMOSVW #optimisation #using
Gradient-Based Optimization of Custom Circuits Using a Static-Timing Formulation (ARC, IME, WWM, PRO, PNS, CV, CBW), pp. 452–459.
DAC-1997-ElfadelL #modelling #network
Zeros and Passivity of Arnoldi-Reduced-Order Models for Interconnect Networks (IME, DDL), pp. 28–33.
DAC-1994-SilveiraEWCK #approach #performance #simulation #using
An Efficient Approach to Transmission Line Simulation Using Measured or Tabulated S-parameter Data (LMS, IME, JW, MC, KSK), pp. 634–639.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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