Travelled to:1 × Germany
Collaborated with:C.Armat G.B.Steven A.Gellert G.Palermo V.Zaccaria A.Florea C.Silvano
Talks about:superscalar (1) architectur (1) processor (1) instruct (1) predict (1) perform (1) organis (1) exploit (1) select (1) impact (1)
Person: Lucian N. Vintan
DBLP: Vintan:Lucian_N=
Contributed to:
2010
1999Wrote 2 papers:
- DATE-2010-GellertPZFVS #architecture #design #energy #predict #smt
- Energy-performance design space exploration in SMT architectures exploiting selective load value predictions (AG, GP, VZ, AF, LNV, CS), pp. 271–274.
- PDP-1999-VintanAS
- The impact of cache organisation on the instruction issue rate of a superscalar processor (LNV, CA, GBS), pp. 58–65.