Travelled to:
1 × USA
2 × France
2 × Germany
Collaborated with:
L.Torres G.Sassatelli D.Puschini G.Perin P.Maurine F.Clermidy C.Jalier D.Lattard A.A.Jerraya Y.Akgul S.Lesecq E.Beigné I.M.Panades T.Gil C.Diou G.Cambon J.Galy
Talks about:
dynam (3) architectur (1) reconfigur (1) implement (1) heterogen (1) distribut (1) constrain (1) frequenc (1) approach (1) amplitud (1)
Person: Pascal Benoit
DBLP: Benoit:Pascal
Contributed to:
Wrote 5 papers:
- DAC-2014-AkgulPLBPBT #power management
- Power management through DVFS and dynamic body biasing in FD-SOI circuits (YA, DP, SL, EB, IMP, PB, LT), p. 6.
- DATE-2012-PerinTBM #analysis #implementation
- Amplitude demodulation-based EM analysis of different RSA implementations (GP, LT, PB, PM), pp. 1167–1172.
- DATE-2010-JalierLJSBT #mobile
- Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem (CJ, DL, AAJ, GS, PB, LT), pp. 184–189.
- DATE-2009-PuschiniCBST #distributed #energy #latency
- Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC (DP, FC, PB, GS, LT), pp. 1564–1567.
- DATE-2002-SassatelliTBGDCG #architecture #configuration management #scalability
- Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications (GS, LT, PB, TG, CD, GC, JG), pp. 553–558.