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Travelled to:
2 × Germany
2 × USA
3 × France
Collaborated with:
P.Vivet C.Bernard O.Turkyilmaz D.Puschini Y.Thonnart D.Dutoit P.Batude O.Rozeau G.Cibrario P.Reddy A.Baghdadi M.Jézéquel F.Darve W.Lafi P.Benoit G.Sassatelli L.Torres P.Gaillardon M.H.B.Jamaa P.Morel J.Noël I.O'Connor P.P.Pande I.Mansouri P.Bogdan R.Marculescu A.Ganguly D.Melpignano L.Benini E.Flamand B.Jego T.Lepley G.Haugou N.Jovanovic S.Onkaraiah H.Oucheikh O.Thomas E.Vianello J.M.Portal M.Bocquet O.Billoint H.Sarhan I.Rayane M.Vinet C.Fenouillet-Béranger F.Deprat A.Fustier J.Michallet O.Faynot J.Christmann S.Thuries
Talks about:
integr (3) power (3) low (3) platform (2) monolith (2) complex (2) energi (2) comput (2) applic (2) embed (2)

Person: Fabien Clermidy

DBLP DBLP: Clermidy:Fabien

Contributed to:

DATE 20152015
DATE 20142014
DAC 20122012
DAC 20112011
DATE 20112011
DATE 20102010
DATE 20092009

Wrote 11 papers:

DATE-2015-BillointSRVBFRC #2d #3d #design #using
A comprehensive study of monolithic 3D cell on cell design using commercial 2D tool (OB, HS, IR, MV, PB, CFB, OR, GC, FD, AF, JM, OF, OT, JFC, ST, FC), pp. 1192–1196.
DATE-2014-ClermidyJOOTTVPB #question
Resistive memories: Which applications? (FC, NJ, SO, HO, OT, OT, EV, JMP, MB), pp. 1–6.
DATE-2014-TurkyilmazCRBC #3d #integration #using
3D FPGA using high-density interconnect Monolithic Integration (OT, GC, OR, PB, FC), pp. 1–4.
DAC-2012-MelpignanoBFJLHCD #embedded #evaluation #framework #manycore #performance #platform #visual notation
Platform 2012, a many-core computing accelerator for embedded SoCs: performance evaluation of visual analytics applications (DM, LB, EF, BJ, TL, GH, FC, DD), pp. 1137–1142.
DAC-2011-GaillardonBMNCO #3d #architecture #question #towards
Can we go towards true 3-D architectures? (PEG, MHBJ, PHM, JPN, FC, IO), pp. 282–283.
DATE-2011-BernardC #power management
A low-power VLIW processor for 3GPP-LTE complex numbers processing (CB, FC), pp. 234–239.
DATE-2011-ClermidyDDLV #3d #embedded #manycore
3D Embedded multi-core: Some perspectives (FC, FD, DD, WL, PV), pp. 1327–1332.
DATE-2011-PandeCPMBMG #energy #performance #question
Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms? (PPP, FC, DP, IM, PB, RM, AG), pp. 1656–1661.
DATE-2011-ReddyCBJ #complexity #power management
A low complexity stopping criterion for reducing power consumption in turbo decoders (PR, FC, AB, MJ), pp. 649–654.
DATE-2010-ThonnartVC #framework #integration #power management
A fully-asynchronous low-power framework for GALS NoC integration (YT, PV, FC), pp. 33–38.
DATE-2009-PuschiniCBST #distributed #energy #latency
Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC (DP, FC, PB, GS, LT), pp. 1564–1567.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.