Travelled to:1 × India
2 × USA
Collaborated with:S.Hahn D.Reddy D.A.Koufaty L.Zhao X.Jiang T.Li R.C.Knauerhase E.Boutin X.Chen J.Ekanayake T.Guan A.Korsun Z.Yin N.Zhang J.Zhou A.K.Mishra R.Iyer Z.Fang S.Srinivasan S.Makineni C.R.Das N.Chitlur G.Srinivasa P.K.Gupta A.Prabhakaran N.Ijih S.Subhaschandra S.Grover R.Iyer
Talks about:architectur (2) heterogen (2) prototyp (1) interact (1) asymmetr (1) support (1) schedul (1) reliabl (1) overlap (1) system (1)
Person: Paul Brett
DBLP: Brett:Paul
Contributed to:
2015
201220112010Wrote 4 papers:
- VLDB-2015-BoutinBCEGKYZZ #interactive #named #reliability
- JetScope: Reliable and Interactive Analytics at Cloud Scale (EB, PB, XC, JE, TG, AK, ZY, NZ, JZ), pp. 1680–1691.
- HPCA-2012-ChitlurSHGRKBPZISGJI #architecture #named #prototype
- QuickIA: Exploring heterogeneous architectures on real prototypes (NC, GS, SH, PKG, DR, DAK, PB, AP, LZ, NI, SS, SG, XJ, RI), pp. 433–440.
- HPCA-2011-JiangMZIFSMBD #named #scheduling #symmetry
- ACCESS: Smart scheduling for asymmetric cache CMPs (XJ, AKM, LZ, RI, ZF, SS, SM, PB, CRD), pp. 527–538.
- HPCA-2010-LiBKKRH #architecture #manycore #operating system
- Operating system support for overlapping-ISA heterogeneous multi-core architectures (TL, PB, RCK, DAK, DR, SH), pp. 1–12.