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Travelled to:
1 × Australia
1 × China
1 × Germany
1 × Greece
1 × India
3 × USA
Collaborated with:
J.Horkoff S.Kang S.Hahn J.Mylopoulos L.Liu F.Peng D.P.Baumberger C.Tsai E.Rosenbaum P.Brett R.C.Knauerhase D.A.Koufaty D.Reddy
Talks about:
requir (3) substrat (2) extract (2) circuit (2) system (2) secur (2) cmos (2) multiprocessor (1) architectur (1) methodolog (1)

Person: Tong Li


Contributed to:

REFSQ 20152015
CAiSE 20142014
HPCA 20102010
RE 20102010
PPoPP 20092009
ICSM 20082008
DAC 19991999
DAC 19981998

Wrote 8 papers:

REFSQ-2015-LiHM #requirements #security #specification
Analyzing and Enforcing Security Mechanisms on Requirements Specifications (TL, JH, JM), pp. 115–131.
CAiSE-2014-LiH #approach #requirements #security
Dealing with Security Requirements for Socio-Technical Systems: A Holistic Approach (TL, JH), pp. 285–300.
HPCA-2010-LiBKKRH #architecture #manycore #operating system
Operating system support for overlapping-ISA heterogeneous multi-core architectures (TL, PB, RCK, DAK, DR, SH), pp. 1–12.
RE-2010-LiuLP #overview #requirements #why
Why Requirements Engineering Fails: A Survey Report from China (LL, TL, FP), pp. 317–322.
PPoPP-2009-LiBH #distributed #multi #performance #scalability #scheduling #using
Efficient and scalable multiprocessor fair scheduling using distributed weighted round-robin (TL, DPB, SH), pp. 65–74.
ICSM-2008-Li08a #evolution #process #research
Research on software evolution processes in Asia (TL), pp. 478–479.
DAC-1999-LiTRK #modelling #simulation
Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation (TL, CHT, ER, SMK), pp. 549–554.
DAC-1998-LiK #layout #verification
Layout Extraction and Verification Methodology CMOS I/O Circuits (TL, SMK), pp. 291–296.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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