BibSLEIGH corpus
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
3 × USA
Collaborated with:
A.E.Ruehli S.G.Walker J.G.Clabes J.Friedrich M.Sweet J.DiLullo S.G.Chu D.W.Plass J.Dawson P.Muench L.Powell M.S.Floyd B.Sinharoy M.Lee M.Goulet J.Wagoner N.S.Schwartz S.L.Runyon G.Gorman R.N.Kalla J.McGill J.S.Dodson
Talks about:
design (3) microprocessor (1) implement (1) technic (1) visual (1) induct (1) speed (1) power (1) vlsi (1) high (1)

Person: Phillip Restle

DBLP DBLP: Restle:Phillip

Contributed to:

DAC 20042004
DAC 20012001
DAC 19991999

Wrote 3 papers:

DAC-2004-ClabesFSDCPDMPFSLGWSRGRKMD #design #implementation
Design and implementation of the POWER5 microprocessor (JGC, JF, MS, JD, SGC, DWP, JD, PM, LP, MSF, BS, ML, MG, JW, NSS, SLR, GG, PR, RNK, JM, JSD), pp. 670–672.
DAC-2001-Restle #design #visualisation
Technical Visualizations in VLSI Design (PR), pp. 494–499.
DAC-1999-RestleRW #design #performance
Dealing with Inductance in High-Speed Chip Design (PR, AER, SGW), pp. 904–909.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.