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Travelled to:
1 × France
1 × Germany
1 × USA
Collaborated with:
C.C.Chen Y.Chang W.Zhang W.Yu Z.Wang Z.Yu J.Xiong
Talks about:
extract (3) capacit (2) electromagnet (1) interconnect (1) transform (1) algorithm (1) statist (1) spatial (1) reorder (1) process (1)

Person: Rong Jiang

DBLP DBLP: Jiang:Rong

Contributed to:

DATE 20082008
DAC 20052005
DATE v2 20042004

Wrote 4 papers:

DATE-2008-ZhangYWYJX #correlation #performance #process #statistics
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation (WZ, WY, ZW, ZY, RJ, JX), pp. 580–585.
DAC-2005-JiangCC #3d #algorithm #linear #named #order
ICCAP: a linear time sparse transformation and reordering algorithm for 3D BEM capacitance extraction (RJ, YHC, CCPC), pp. 163–166.
DATE-v2-2004-JiangC #named
SCORE: SPICE COmpatible Reluctance Extraction (RJ, CCPC), pp. 948–953.
DATE-v2-2004-JiangC04a #reduction
Realizable Reduction for Electromagnetically Coupled RLMC Interconnects (RJ, CCPC), pp. 1400–1401.
Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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