BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
6 × USA
Collaborated with:
T.Li Z.Ye M.Gao Z.Yang W.Zhang Y.Li Y.Wang L.Wu Z.Li W.Zhao Y.E.Lien W.Zhang W.Yu Z.Wang R.Jiang J.Xiong
Talks about:
leakag (4) statist (3) analysi (3) chip (3) process (2) variat (2) effici (2) correl (2) consid (2) novel (2)

Person: Zhiping Yu

DBLP DBLP: Yu:Zhiping

Contributed to:

DAC 20112011
DAC 20102010
DAC 20082008
DATE 20082008
DAC 20072007
DAC 19911991
DAC 19891989

Wrote 7 papers:

DAC-2011-YeLGY #framework #megamodelling #novel
A novel framework for passive macro-modeling (ZY, YL, MG, ZY), pp. 546–551.
DAC-2010-GaoYWY #analysis #correlation #estimation #performance #statistics
Efficient tail estimation for massive correlated log-normal sums: with applications in statistical leakage analysis (MG, ZY, YW, ZY), pp. 475–480.
DAC-2008-LiZY #analysis #verification
Full-chip leakage analysis in nano-scale technologies: mechanisms, variation sources, and verification (TL, WZ, ZY), pp. 594–599.
DATE-2008-ZhangYWYJX #correlation #performance #process #statistics
An Efficient Method for Chip-Level Statistical Capacitance Extraction Considering Process Variations with Spatial Correlation (WZ, WY, ZW, ZY, RJ, JX), pp. 580–585.
DAC-2007-LiY #analysis #power management #statistics
Statistical Analysis of Full-Chip Leakage Power Considering Junction Tunneling Leakage (TL, ZY), pp. 99–102.
DAC-1991-WuYYL #design #multi #named #optimisation #process
GOALSERVER: A Multiobjective Design Optimization Tool for IC Fabrication Process (LW, ZY, ZY, ZL), pp. 585–590.
DAC-1989-YuZYL #algorithm #behaviour #convergence #novel
A Novel Algorithm for Improving Convergence Behavior of Circuit Simulators (ZY, WZ, ZY, YEL), pp. 626–629.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.