BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × Germany
2 × France
2 × USA
Collaborated with:
S.Parameswaran T.Li J.A.Ambrose K.Patel M.Shafique S.Rehman S.Radhakrishnan J.Henkel
Talks about:
processor (3) instruct (2) secur (2) base (2) architectur (1) checkpoint (1) framework (1) recoveri (1) configur (1) softwar (1)

Person: Roshan G. Ragel

DBLP DBLP: Ragel:Roshan_G=

Contributed to:

DATE 20132013
DATE 20122012
DATE 20092009
DAC 20072007
DAC 20062006

Wrote 5 papers:

DATE-2013-LiSRRRAHP #configuration management #named
CSER: HW/SW configurable soft-error resiliency for application specific instruction-set processors (TL, MS, SR, SR, RGR, JAA, JH, SP), pp. 707–712.
DATE-2012-LiRP #embedded #hardware #named
Reli: Hardware/software Checkpoint and Recovery scheme for embedded processors (TL, RGR, SP), pp. 875–880.
DATE-2009-PatelPR #architecture #framework #named #security
CUFFS: An instruction count based architectural framework for security of MPSoCs (KP, SP, RGR), pp. 779–784.
DAC-2007-AmbroseRP #analysis #injection #named #random
RIJID: Random Code Injection to Mask Power Analysis based Side Channel Attacks (JAA, RGR, SP), pp. 489–492.
DAC-2006-RagelP #monitoring #named #reliability #security
IMPRES: integrated monitoring for processor reliability and security (RGR, SP), pp. 502–505.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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