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Travelled to:
3 × USA
Collaborated with:
J.Kao A.Chandrakasan A.Keshavarzi V.De S.Borkar T.Karnik J.Tschanz A.Vassighi G.Schrom Y.Ye S.Lee G.Chrysler M.Sachdev
Talks about:
microarchitectur (1) microprocessor (1) temperatur (1) hierarch (1) discharg (1) pattern (1) paramet (1) circuit (1) variat (1) mutual (1)

Person: Siva Narendra

DBLP DBLP: Narendra:Siva

Contributed to:

DAC 20042004
DAC 20032003
DAC 19981998

Wrote 3 papers:

DAC-2004-VassighiKNSYLCSD #design #optimisation
Design optimizations for microprocessors at low temperature (AV, AK, SN, GS, YY, SL, GC, MS, VD), pp. 2–5.
DAC-2003-BorkarKNTKD #architecture #parametricity
Parameter variations and impact on circuits and microarchitecture (SB, TK, SN, JT, AK, VD), pp. 338–342.
MTCMOS Hierarchical Sizing Based on Mutual Exclusive Discharge Patterns (JK, SN, AC), pp. 495–500.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.