Travelled to:
1 × Germany
1 × USA
2 × France
Collaborated with:
∅ M.Nummer A.Vassighi A.Keshavarzi S.Narendra G.Schrom Y.Ye S.Lee G.Chrysler V.De
Talks about:
test (3) iddq (2) microprocessor (1) temperatur (1) transform (1) sequenti (1) pipelin (1) perform (1) circuit (1) voltag (1)
Person: Manoj Sachdev
DBLP: Sachdev:Manoj
Contributed to:
Wrote 4 papers:
- DAC-2004-VassighiKNSYLCSD #design #optimisation
- Design optimizations for microprocessors at low temperature (AV, AK, SN, GS, YY, SL, GC, MS, VD), pp. 2–5.
- DATE-2003-NummerS #pipes and filters #testing
- DFT for Testing igh-Performance Pipelined Circuits with Slow-Speed Testers (MN, MS), pp. 10212–10217.
- EDTC-1997-Sachdev #testing
- Deep sub-micron IDDQ testing: issues and solutions (MS), pp. 271–278.
- EDAC-1994-Sachdev #logic #testing
- Transforming Sequential Logic in Digital CMOS ICs for Voltage and IDDQ Testing (MS), pp. 361–365.