Travelled to:1 × France
1 × Germany
2 × USA
Collaborated with:V.Narayanan M.S.Park D.Dantara C.Zhang M.DeBole J.Sabarad M.J.Irwin K.M.Irick S.Park A.Al-Maashri C.Chakrabarti
Talks about:acceler (3) fpga (2) reconstruct (1) architectur (1) framework (1) algorithm (1) recognit (1) salienc (1) classif (1) stream (1)
Person: Srinidhi Kestur
DBLP: Kestur:Srinidhi
Contributed to:
2013
201220112011Wrote 4 papers:
- DAC-2013-ParkZDK #recognition
- Accelerators for biologically-inspired attention and recognition (MSP, CZ, MD, SK), p. 6.
- DATE-2012-ParkKSNI #classification
- An FPGA-based accelerator for cortical object classification (MSP, SK, JS, VN, MJI), pp. 691–696.
- DAC-2011-KesturIPANC #architecture #co-evolution #design #framework #re-engineering #using
- An algorithm-architecture co-design framework for gridding reconstruction using FPGAs (SK, KMI, SP, AAM, VN, CC), pp. 585–590.
- DATE-2011-KesturDN #named #streaming
- SHARC: A streaming model for FPGA accelerators and its application to Saliency (SK, DD, VN), pp. 1237–1242.