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Travelled to:
1 × China
1 × Germany
9 × USA
Collaborated with:
J.Zhuo S.B.K.Vrudhula N.Chang V.Papirla S.Udayanarayanan W.Shiue D.N.Rakhmatov D.Blaauw A.Al-Maashri V.Narayanan K.Lee Y.Cho R.Sampson M.Yang S.Wei T.F.Wenisch M.Seok D.Jeon D.Sylvester S.Kestur K.M.Irick S.Park M.DeBole M.Cotter N.Chandramoorthy Y.Xiao S.Seo R.G.Dreslinski M.Woh Y.Park S.A.Mahlke T.N.Mudge Y.Zhang L.Deng P.Yedlapalli S.P.Muralidhara H.Zhao M.T.Kandemir N.Pitsianis X.Sun
Talks about:
system (4) energi (4) power (4) code (3) architectur (2) algorithm (2) function (2) generat (2) acceler (2) voltag (2)

Person: Chaitali Chakrabarti

DBLP DBLP: Chakrabarti:Chaitali

Contributed to:

HPCA 20132013
DAC 20122012
DAC 20112011
DATE 20102010
DAC 20092009
DAC 20072007
DAC 20062006
DAC 20052005
DAC 20022002
DAC 20012001
DAC 19991999

Wrote 14 papers:

HPCA-2013-SampsonYWCW #3d #parallel
Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound (RS, MY, SW, CC, TFW), pp. 318–329.
DAC-2012-Al-MaashriDCCXNC #algorithm #recognition
Accelerating neuromorphic vision algorithms for recognition (AAM, MD, MC, NC, YX, VN, CC), pp. 579–584.
DAC-2012-SeoDWPCMBM #architecture #process
Process variation in near-threshold wide SIMD architectures (SS, RGD, MW, YP, CC, SAM, DB, TNM), pp. 980–987.
DAC-2011-KesturIPANC #architecture #co-evolution #design #framework #re-engineering #using
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs (SK, KMI, SP, AAM, VN, CC), pp. 585–590.
DAC-2011-SeokJCBS #design #energy #performance #pipes and filters
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design (MS, DJ, CC, DB, DS), pp. 990–995.
DATE-2010-ZhangDYMZKCPS #code generation #compilation #evaluation
A special-purpose compiler for look-up table and code generation for function evaluation (YZ, LD, PY, SPM, HZ, MTK, CC, NP, XS), pp. 1130–1135.
DAC-2009-PapirlaC #energy #fault
Energy-aware error control coding for Flash memories (VP, CC), pp. 658–663.
DAC-2007-ZhuoCLC #hybrid #power management
Dynamic Power Management with Hybrid Power Sources (JZ, CC, KL, NC), pp. 871–876.
DAC-2006-ChoCCV #cost analysis #embedded #energy #power management
High-level power management of embedded systems with application-specific energy cost functions (YC, NC, CC, SBKV), pp. 568–573.
DAC-2006-ZhuoCCV #hybrid
Extending the lifetime of fuel cell based hybrid systems (JZ, CC, NC, SBKV), pp. 562–567.
DAC-2005-ZhuoC #energy #scheduling
System-level energy-efficient dynamic task scheduling (JZ, CC), pp. 628–631.
DAC-2002-RakhmatovVC #scalability
Battery-conscious task sequencing for portable devices including voltage/clock scaling (DNR, SBKV, CC), pp. 189–194.
DAC-2001-UdayanarayananC #code generation
Address Code Generation for Digital Signal Processors (SU, CC), pp. 353–358.
DAC-1999-ShiueC #embedded #memory management #power management
Memory Exploration for Low Power, Embedded Systems (WTS, CC), pp. 140–145.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.