Travelled to:1 × Germany
2 × France
4 × USA
Collaborated with:K.Roy S.Motaman S.Bhunia J.Park A.Iyengar ∅ N.Rathi P.Ndai J.Chung K.Ramclam J.Jang S.Mukhopadhyay K.Kim
Talks about:low (4) voltag (3) sttram (3) robust (3) memori (3) power (3) adapt (3) self (3) overhead (2) domain (2)
Person: Swaroop Ghosh
DBLP: Ghosh:Swaroop
Contributed to:
2015
201520142013200820072006Wrote 9 papers:
- DAC-2015-ChungRPG #energy #memory management
- Domain wall memory based digital signal processors for area and energy-efficiency (JC, KR, JP, SG), p. 6.
- DAC-2015-JangPGB #self
- Self-correcting STTRAM under magnetic field attacks (JWJ, JP, SG, SB), p. 6.
- DATE-2015-MotamanGR #adaptation #robust
- Impact of process-variations in STTRAM and adaptive boosting for robustness (SM, SG, NR), pp. 1431–1436.
- DAC-2014-IyengarG #analysis #embedded #memory management #modelling #power management #robust
- Modeling and Analysis of Domain Wall Dynamics for Robust and Low-Power Embedded Memory (AI, SG), p. 6.
- DAC-2014-MotamanG #array #robust #self #testing
- Simultaneous Sizing, Reference Voltage and Clamp Voltage Biasing for Robustness, Self-Calibration and Testability of STTRAM Arrays (SM, SG), p. 2.
- DAC-2013-Ghosh #memory management
- Path to a TeraByte of on-chip memory for petabit per second bandwidth with < 5watts of power (SG), p. 2.
- DATE-2008-GhoshNR #adaptation #fault tolerance #novel #using
- A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking (SG, PN, KR), pp. 366–371.
- DATE-2007-GhoshBR #adaptation #scheduling #synthesis #using
- Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling (SG, SB, KR), pp. 1532–1537.
- DAC-2006-GhoshMKR #power management #reduction #self
- Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM (SG, SM, KK, KR), pp. 971–976.