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Travelled to:
1 × France
3 × USA
Collaborated with:
L.T.Pileggi A.J.Strojwas A.Koorapaty P.Gopalakrishnan V.Rovner M.Fu T.G.Hersan D.Motiani Y.Takegawa H.Schmit C.Patel K.Y.Tong
Talks about:
regular (4) fabric (3) explor (3) logic (2) architectur (1) methodolog (1) manufactur (1) granular (1) perform (1) design (1)

Person: V. Kheterpal

DBLP DBLP: Kheterpal:V=

Contributed to:

DAC 20052005
DAC 20042004
DATE v1 20042004
DAC 20032003

Wrote 4 papers:

DAC-2005-KheterpalRHMTSP #design
Design methodology for IC manufacturability based on regular logic-bricks (VK, VR, TGH, DM, YT, AJS, LTP), pp. 353–358.
DAC-2004-KheterpalSP #architecture
Routing architecture exploration for regular fabrics (VK, AJS, LTP), pp. 204–207.
DATE-v1-2004-KoorapatyKGFP #logic
Exploring Logic Block Granularity for Regular Fabrics (AK, VK, PG, MF, LTP), pp. 468–473.
DAC-2003-PileggiSSGKKPRT #trade-off
Exploring regular fabrics to optimize the performance-cost trade-off (LTP, HS, AJS, PG, VK, AK, CP, VR, KYT), pp. 782–787.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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