BibSLEIGH corpus
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BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
3 × USA
Collaborated with:
A.J.Strojwas L.T.Pileggi V.Kheterpal T.Jhaveri T.G.Hersan D.Motiani Y.Takegawa H.Schmit P.Gopalakrishnan A.Koorapaty C.Patel K.Y.Tong
Talks about:
regular (2) design (2) optim (2) lithographi (1) methodolog (1) manufactur (1) perform (1) fabric (1) explor (1) afford (1)

Person: Vyacheslav Rovner

DBLP DBLP: Rovner:Vyacheslav

Contributed to:

DAC 20092009
DAC 20052005
DAC 20032003

Wrote 3 papers:

DAC-2009-StrojwasJRP #using
Creating an affordable 22nm node using design-lithography co-optimization (AJS, TJ, VR, LTP), pp. 95–96.
DAC-2005-KheterpalRHMTSP #design
Design methodology for IC manufacturability based on regular logic-bricks (VK, VR, TGH, DM, YT, AJS, LTP), pp. 353–358.
DAC-2003-PileggiSSGKKPRT #trade-off
Exploring regular fabrics to optimize the performance-cost trade-off (LTP, HS, AJS, PG, VK, AK, CP, VR, KYT), pp. 782–787.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.