BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
1 × France
4 × Germany
Collaborated with:
A.Herkersdorf C.Claus J.Zeppenfeld N.Alt F.H.Müller L.A.Cárcel S.Herrmann J.L.Simón P.Zuber A.Windschiegl R.M.B.d.Otálora J.Becker M.Hübner R.Esser V.Lauer M.May N.Wehn A.Bouajila D.Ziener J.Teich
Talks about:
system (4) architectur (3) processor (2) process (2) hardwar (2) acceler (2) vision (2) design (2) assist (2) video (2)

Person: Walter Stechele

DBLP DBLP: Stechele:Walter

Contributed to:

DATE 20102010
DATE 20082008
DATE 20072007
DATE 20062006
DATE 20052005

Wrote 7 papers:

DATE-2010-MayWBZSHZT #agile #multi #prototype
A rapid prototyping system for error-resilient multi-processor systems-on-chip (MM, NW, AB, JZ, WS, AH, DZ, JT), pp. 375–380.
DATE-2008-AltCS #algorithm #architecture #detection #hardware #realtime
Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments (NA, CC, WS), pp. 176–181.
DATE-2008-BeckerHEHSL #architecture #communication #design
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems (JB, MH, RE, AH, WS, VL).
DATE-2007-ClausZMS #configuration management #hardware #using #video
Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system (CC, JZ, FHM, WS), pp. 498–503.
DATE-2006-HerkersdorfS #architecture #flexibility #named
AutoVision: flexible processor architecture for video-assisted driving (AH, WS), p. 556.
DATE-2005-StecheleCHS #information management #visual notation
A Coprocessor for Accelerating Visual Information Processing (WS, LAC, SH, JLS), pp. 26–31.
DATE-2005-ZuberWOSH #optimisation #power management #reduction
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization (PZ, AW, RMBdO, WS, AH), pp. 986–987.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.