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Travelled to:
1 × France
2 × Germany
Collaborated with:
J.Becker K.Paulsson S.Werner O.Oey D.Göhringer Florian Kästner D.Kuschnerus Christoph Spiegel Benedikt Janßen R.Esser A.Herkersdorf W.Stechele V.Lauer J.Meyer J.Noguera L.Braun O.Sander R.M.Gil R.Stewart A.Deledda C.Mucci A.Vitkovski P.Bonnot A.Grasset P.Millet M.Kühnle F.Ries M.Coppola L.Pieralisi R.Locatelli G.Maruccia F.Campi T.DeMarco
Talks about:
system (4) design (4) reconfigur (3) communic (3) base (3) architectur (2) heterogen (2) integr (2) power (2) fpgas (2)

Person: Michael Hübner

DBLP DBLP: H=uuml=bner:Michael

Contributed to:

DATE 20122012
DATE 20112011
DATE 20082008
CASE 20182018

Wrote 6 papers:

DATE-2012-WernerOGHB #configuration management #distributed #manycore
Virtualized on-chip distributed computing for heterogeneous reconfigurable multi-core systems (SW, OO, DG, MH, JB), pp. 280–283.
DATE-2011-MeyerNHBSGSB #configuration management #performance #using
Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration (JM, JN, MH, LB, OS, RMG, RS, JB), pp. 1542–1547.
DATE-2008-BeckerHEHSL #architecture #communication #design
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems (JB, MH, RE, AH, WS, VL).
DATE-2008-DeleddaMVBGMKRHBCPLMCD #communication #configuration management #design #framework
Design of a HW/SW Communication Infrastructure for a Heterogeneous Reconfigurable Processor (AD, CM, AV, PB, AG, PM, MK, FR, MH, JB, MC, LP, RL, GM, FC, TD), pp. 1352–1357.
DATE-2008-PaulssonHB #integration #metric #power management
Cost-and Power Optimized FPGA based System Integration: Methodologies and Integration of a Low-Power Capacity-based Measurement Application on Xilinx FPGAs (KP, MH, JB), pp. 50–55.
CASE-2018-KastnerKSJH #architecture #communication #cyber-physical #design #performance
Design of an efficient Communication Architecture for Cyber-Physical Production Systems (FK, DK, CS, BJ, MH), pp. 829–835.

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