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Travelled to:
4 × USA
Collaborated with:
S.Dey C.Zhao C.Visweswariah P.N.Strenski L.Chen J.Rajski
Talks about:
test (3) interconnect (2) methodolog (2) crosstalk (2) circuit (2) chip (2) uncertainti (1) processor (1) compound (1) scalabl (1)

Person: Xiaoliang Bai

DBLP DBLP: Bai:Xiaoliang

Contributed to:

DAC 20042004
DAC 20022002
DAC 20012001
DAC 20002000

Wrote 4 papers:

DAC-2004-ZhaoBD #analysis #scalability
A scalable soft spot analysis methodology for compound noise effects in nano-meter circuits (CZ, XB, SD), pp. 894–899.
DAC-2002-BaiVS #optimisation
Uncertainty-aware circuit optimization (XB, CV, PNS), pp. 58–63.
DAC-2001-ChenBD #embedded #fault #testing #using
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores (LC, XB, SD), pp. 317–320.
DAC-2000-BaiDR #self
Self-test methodology for at-speed test of crosstalk in chip interconnects (XB, SD, JR), pp. 619–624.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.