BibSLEIGH — Andreas

Travelled to:

2 × France
2 × USA
6 × Germany

Collaborated with:

Z.Wang W.Stechele T.Wild J.Becker P.P.Damodaran S.Wallentowitz K.Lu R.Ohlendorf C.Herber A.Richter D.Münch M.Paulitsch O.Hanka W.Haberl M.Wechs N.Wehn J.Teich P.Zuber A.Windschiegl R.M.B.d.Otálora M.Hübner R.Esser V.Lauer R.Leupers G.Martin R.Plyaskin F.Schirrmeister T.Kogel M.Vaupel M.May A.Bouajila J.Zeppenfeld D.Ziener U.Schlichtmann V.Kleeberger J.A.Abraham A.Evans C.Gimmler-Dumont M.Glaß S.R.Nassif J.Heisswolf A.Zaib A.Zwinkau S.Kobbe A.Weichslgartner J.Henkel G.Snelting A.Heinig M.Dietrich F.Miller K.Hahn A.Grunewald R.Brück S.Krohnert J.Reisinger O.Sander T.Sandmann V.V.Duy S.Bähr F.Bapp H.Michel D.Kaule D.Adam E.Lübbers J.Hairbucher

Talks about:

system (11) level (4) architectur (3) processor (3) virtual (3) softwar (3) design (3) multi (3) embed (3) time (3)

Person: Andreas Herkersdorf

DBLP: Herkersdorf:Andreas

Contributed to:

2015

2014

2012

2011

2010

2009

2008

2006

2005

Wrote 16 papers:

DATE-2015-HerberRWH #realtime #scheduling #using: Real-time capable CAN to AVB ethernet gateway using frame aggregation and scheduling (CH, AR, TW, AH), pp. 61–66.
DATE-2015-MunchPHH #embedded #manycore #named #realtime #scalability #using: MPIOV: scaling hardware-based I/O virtualization for mixed-criticality embedded real-time systems using non transparent bridges to (multi-core) multi-processor systems (DM, MP, OH, AH), pp. 579–584.
DAC-2014-HeisswolfZZKWTHSHB #communication #named #programming: CAP: Communication Aware Programming (JH, AZ, AZ, SK, AW, JT, JH, GS, AH, JB), p. 6.
DATE-2014-DamodaranWH #distributed #multi: Distributed cooperative shared last-level caching in tiled multiprocessor system on chip (PPD, SW, AH), pp. 1–4.
DATE-2014-HeinigDHMWHGBKR #integration: System integration — The bridge between More than Moore and More Moore (AH, MD, AH, FM, TW, KH, AG, RB, SK, JR), pp. 1–9.
DATE-2014-SanderSDBBBMKALHRHH #hardware #manycore: Hardware virtualization support for shared resources in mixed-criticality multicore systems (OS, TS, VVD, SB, FB, JB, HUM, DK, DA, EL, JH, AR, CH, AH), pp. 1–6.
DATE-2014-SchlichtmannKAEGGHNW #abstraction #design: Connecting different worlds — Technology abstraction for reliability-aware design and Test (US, VK, JAA, AE, CGD, MG, AH, SRN, NW), pp. 1–8.
DATE-2012-LeupersMPHSKV #platform: Virtual platforms: Breaking new grounds (RL, GM, RP, AH, FS, TK, MV), pp. 685–690.
DATE-2011-WangLH #approach #embedded: An approach to improve accuracy of source-level TLMs of embedded software (ZW, KL, AH), pp. 216–221.
DATE-2010-MayWBZSHZT #agile #multi #prototype: A rapid prototyping system for error-resilient multi-processor systems-on-chip (MM, NW, AB, JZ, WS, AH, DZ, JT), pp. 375–380.
DAC-2009-WangH #approach #embedded #performance #simulation: An efficient approach for system-level timing simulation of compiler-optimized embedded software (ZW, AH), pp. 220–225.
DAC-2009-WangHHW #framework #named #platform: SysCOLA: a framework for co-development of automotive software and system platform (ZW, AH, WH, MW), pp. 37–42.
DATE-2008-BeckerHEHSL #architecture #communication #design: Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems (JB, MH, RE, AH, WS, VL).
DATE-2006-HerkersdorfS #architecture #flexibility #named: AutoVision: flexible processor architecture for video-assisted driving (AH, WS), p. 556.
DATE-2006-WildHO #architecture #evaluation #performance #simulation #transaction #using: Performance evaluation for system-on-chip architectures using trace-based transaction level simulation (TW, AH, RO), pp. 248–253.
DATE-2005-ZuberWOSH #optimisation #power management #reduction: Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization (PZ, AW, RMBdO, WS, AH), pp. 986–987.