BibSLEIGH — William_J

Travelled to:

1 × Mexico
1 × Spain
2 × France
21 × USA

Collaborated with:

∅ A.Chang L.Peh J.S.Keen A.A.Chien M.Erez S.W.Keckler B.Towles G.Michelogiannakis J.H.Ahn S.Rixner U.J.Kapasi J.D.Owens J.D.Balfour S.Fiske P.R.Nuth E.Spertus P.Agrawal P.R.Mattson C.Malachowsky B.Khailany N.P.Carter R.Tutundjian W.Horwat Y.Turakhia G.Bejerano N.Jiang D.U.Becker N.Jayasena M.Houston J.Y.Park M.Ren T.J.Knight K.Fatahalian A.Aiken P.Hanrahan J.Park S.Park D.Black-Schaffer C.Kozyrakis A.K.Ezzat W.C.Fischer H.V.Jagadish A.S.Krishnakumar

Talks about:

architectur (4) processor (4) regist (4) network (3) hardwar (3) design (3) custom (3) chip (3) log (3) interconnect (2)

Person: William J. Dally

DBLP: Dally:William_J=

Contributed to:

2013

2012

2009

2008

2007

2005

2004

2003

2001

2000

1995

1994

1993

1990

1989

1987

2018

Wrote 29 papers:

DAC-2013-DallyMK #design #tool support: 21st century digital design tools (WJD, CM, SWK), p. 6.
HPCA-2012-JiangBMD #network: Network congestion avoidance through Speculative Reservation (NJ, DUB, GM, WJD), pp. 443–454.
HPCA-2009-MichelogiannakisBD #network: Elastic-buffer flow control for on-chip networks (GM, JDB, WJD), pp. 151–162.
PPoPP-2008-HoustonPRKFADH #interface #memory management #multi #runtime: A portable runtime interface for multi-level memory hierarchies (MH, JYP, MR, TJK, KF, AA, WJD, PH), pp. 143–152.
DATE-2007-ParkPBBKD #architecture #embedded #performance #pointer: Register pointer architecture for efficient embedded processors (JP, SBP, JDB, DBS, CK, WJD), pp. 600–605.
HPCA-2007-Dally: Interconnect-Centric Computing (WJD), p. 1.
PPoPP-2007-KnightPRHEFADH #compilation #memory management: Compilation for explicitly managed memory hierarchies (TJK, JYP, MR, MH, ME, KF, AA, WJD, PH), pp. 226–236.
DAC-2005-ChangD #perspective: Explaining the gap between ASIC and custom power: a custom perspective (AC, WJD), pp. 281–284.
HPCA-2005-AhnED #architecture #parallel: Scatter-Add in Data Parallel Architectures (JHA, ME, WJD), pp. 132–142.
HPCA-2004-JayasenaEAD: Stream Register Files with Indexed Access (NJ, ME, JHA, WJD), pp. 60–72.
HPCA-2003-KhailanyDRKOT #scalability: Exploring the VLSI Scalability of Stream Processors (BK, WJD, SR, UJK, JDO, BT), pp. 153–164.
DAC-2001-DallyT #network: Route Packets, Not Wires: On-Chip Interconnection Networks (WJD, BT), pp. 684–689.
HPCA-2001-PehD #architecture #pipes and filters: A Delay Model and Speculative Architecture for Pipelined Routers (LSP, WJD), pp. 255–266.
ASPLOS-2000-MattsonDRKO #communication #scheduling: Communication Scheduling (PRM, WJD, SR, UJK, JDO), pp. 82–92.
DAC-2000-DallyC #design: The role of custom design in ASIC Chips (WJD, AC), pp. 643–647.
HPCA-2000-PehD: Flit-Reservation Flow Control (LSP, WJD), pp. 73–84.
HPCA-2000-RixnerDKMKO: Register Organization for Media Processing (SR, WJD, BK, PRM, UJK, JDO), pp. 375–386.
HPCA-1995-FiskeD #concurrent #parallel #scheduling #thread: Thread Prioritization: A Thread Scheduling Mechanism for Multiple-Context Parallel Processors (SF, WJD), pp. 210–221.
HPCA-1995-NuthD #implementation #performance: The Named-State Register File: Implementation and Performance (PRN, WJD), pp. 4–13.
PPoPP-1995-SpertusD #locality: Evaluating the Locality Benefits of Active Messages (ES, WJD), pp. 189–198.
ASPLOS-1994-CarterKD #hardware #performance: Hardware Support for Fast Capability-based Addressing (NPC, SWK, WJD), pp. 319–327.
CIKM-1994-KeenD #named: XEL: Extended Ephemeral Logging for Log Storage Management (JSK, WJD), pp. 312–321.
SIGMOD-1993-KeenD #evaluation #performance: Performance Evaluation of Ephemeral Logging (JSK, WJD), pp. 187–196.
PPoPP-1990-ChienD #concurrent: Concurrent Aggregates (CA) (AAC, WJD), pp. 187–196.
ASPLOS-1989-Dally #float: Micro-Optimization of Floating Point Operations (WJD), pp. 283–289.
DAC-1989-AgrawalTD #algorithm #hardware #logic: Algorithms for Accuracy Enhancement in a Hardware Logic Simulator (PA, RT, WJD), pp. 645–648.
PLDI-1989-HorwatCD #experience #implementation #programming: Experience with CST: Programming and Implementation (WH, AAC, WJD), pp. 101–109.
DAC-1987-AgrawalDEFJK #architecture #design #hardware: Architecture and Design of the MARS Hardware Accelerator (PA, WJD, AKE, WCF, HVJ, ASK), pp. 101–107.
ASPLOS-2018-TurakhiaBD #assembly #named: Darwin: A Genomics Co-processor Provides up to 15, 000X Acceleration on Long Read Assembly (YT, GB, WJD), pp. 199–213.