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Travelled to:
7 × USA
Collaborated with:
F.Brewer W.Meyer J.Long B.M.Pangrle F.Tada D.A.Lobo L.Séméria R.Mehra A.Ekanayake D.Ng
Talks about:
synthesi (4) high (4) level (3) synthes (2) design (2) base (2) telecommun (1) methodolog (1) processor (1) construct (1)

Person: Andrew Seawright

DBLP DBLP: Seawright:Andrew

Contributed to:

DAC 20072007
DAC 20022002
DAC 19981998
DAC 19971997
DAC 19931993
DAC 19921992
DAC 19911991

Wrote 7 papers:

DAC-2007-LongS #verification
Synthesizing SVA Local Variables for Formal Verification (JL, AS), pp. 75–80.
DAC-2002-SemeriaMPESN #concurrent #design #multi #thread #verification
RTL c-based methodology for designing and verifying a multi-threaded processor (LS, RM, BMP, AE, AS, DN), pp. 123–128.
DAC-1998-SeawrightM #clustering #optimisation
Partitioning and Optimizing Controllers Synthesized from Hierarchical High-Level Descriptions (AS, WM), pp. 770–775.
DAC-1997-MeyerST #array #design #synthesis
Design and Synthesis of Array Structured Telecommunication Processing Applications (WM, AS, FT), pp. 486–491.
DAC-1993-SeawrightB #performance #synthesis
High-Level Symbolic Construction Technique for High Performance Sequential Synthesis (AS, FB), pp. 424–428.
DAC-1992-SeawrightB #specification #synthesis
Synthesis from Production-Based Specifications (AS, FB), pp. 194–199.
DAC-1991-PangrleBLS #synthesis
Relevant Issues in High-Level Connectivity Synthesis (BMP, FB, DAL, AS), pp. 607–610.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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