BibSLEIGH corpus
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Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
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Travelled to:
2 × USA
Collaborated with:
H.Wang G.Byun J.H.Ahn N.S.Kim J.Yim Y.Hwang H.Choi W.Yang H.Oh I.Park C.Kyung
Talks about:
microprocessor (1) architectur (1) methodolog (1) processor (1) heterogen (1) parallel (1) complex (1) channel (1) system (1) serial (1)

Person: Chang-Jae Park

DBLP DBLP: Park:Chang=Jae

Contributed to:

HPCA 20152015
DAC 19971997

Wrote 2 papers:

HPCA-2015-WangPBAK #alloy #architecture #memory management #named
Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems (HW, CJP, GB, JHA, NSK), pp. 296–308.
DAC-1997-YimHPCYOPK #design #verification
A C-Based RTL Design Verification Methodology for Complex Microprocessor (JSY, YHH, CJP, HC, WSY, HSO, ICP, CMK), pp. 83–88.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.