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Travelled to:
1 × Germany
2 × France
2 × USA
Collaborated with:
P.Ienne E.Charbon A.G.Bayrak P.Brisk A.C.Nácul M.Lajolo F.Standaert A.Tumeo G.Palermo F.Ferrandi D.Sciuto N.Velickovic D.Novo A.Cevrero M.Schwander S.Badel Y.Leblebici
Talks about:
power (3) architectur (2) multiprocessor (1) countermeasur (1) reconfigur (1) implement (1) standard (1) recognit (1) support (1) schedul (1)

Person: Francesco Regazzoni

DBLP DBLP: Regazzoni:Francesco

Contributed to:

DAC 20132013
DATE 20132013
DAC 20112011
DATE 20102010
DATE 20072007

Wrote 6 papers:

DAC-2013-CharbonR #image
Single-photon image sensors (EC, FR), p. 4.
DATE-2013-BayrakVRNBI
An EDA-friendly protection scheme against side-channel attacks (AGB, NV, FR, DN, PB, PI), pp. 410–415.
DAC-2011-BayrakRBSI #analysis #automation #towards
A first step towards automatic application of power analysis countermeasures (AGB, FR, PB, FXS, PI), pp. 230–235.
DAC-2011-CevreroRSBIL #library #logic #power management #standard
Power-gated MOS current mode logic (PG-MCML): a power aware DPA-resistant standard cell library (AC, FR, MS, SB, PI, YL), pp. 1014–1019.
DATE-2010-TumeoRPFS #architecture #configuration management #implementation #multi #recognition #reliability
A reconfigurable multiprocessor architecture for a reliable face recognition implementation (AT, FR, GP, FF, DS), pp. 319–322.
DATE-2007-NaculRL #architecture #hardware #scheduling
Hardware scheduling support in SMP architectures (ACN, FR, ML), pp. 642–647.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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