BibSLEIGH — David

Travelled to:

3 × France
3 × Germany
3 × USA

Collaborated with:

P.Ienne F.Catthoor B.Bougard L.V.d.Perre M.Li X.Jimenez P.Brisk R.Fasthuber A.Becker S.E.Alaoui N.Farahpour U.Ahmad M.Stojilovic L.Saranovac P.Raghavan A.Lambrechts A.G.Bayrak N.Velickovic F.Regazzoni W.Xu B.D.Sutter S.Rabou O.Allam S.Dupont J.Deng Y.Fang Z.Du Y.Wang H.Li O.Temam X.Li Y.Chen C.Wu

Talks about:

baseband (4) softwar (4) architectur (3) processor (3) parallel (3) instruct (3) applic (3) time (3) mimo (3) base (3)

Person: David Novo

DBLP: Novo:David

Contributed to:

2015

2014

2013

2012

2010

2009

2008

Wrote 16 papers:

DATE-2015-DengFDWLTINLCW #fault #hardware #network: Retraining-based timing error mitigation for hardware neural networks (JD, YF, ZD, YW, HL, OT, PI, DN, XL, YC, CW), pp. 593–596.
DATE-2014-BeckerNI #named #sketching: SKETCHILOG: Sketching combinational circuits (AB, DN, PI), pp. 1–4.
DATE-2014-NovoFIAC #approximate #case study #energy #performance #runtime: Energy efficient MIMO processing: A case study of opportunistic run-time approximations (DN, NF, PI, UA, FC), pp. 1–6.
DATE-2013-BayrakVRNBI: An EDA-friendly protection scheme against side-channel attacks (AGB, NV, FR, DN, PB, PI), pp. 410–415.
DATE-2013-JimenezNI #named: Phœnix: reviving MLC blocks as SLC to extend NAND flash devices lifetime (XJ, DN, PI), pp. 226–229.
DATE-2013-NovoAI #estimation #fault #fixpoint #invariant #linear #trade-off: Accuracy vs speed tradeoffs in the estimation of fixed-point errors on linear time-invariant systems (DN, SEA, PI), pp. 15–20.
DAC-2012-JimenezNI: Software controlled cell bit-density to improve NAND flash lifetime (XJ, DN, PI), pp. 229–234.
DATE-2012-StojilovicNSBI #flexibility: Selective flexibility: Breaking the rigidity of datapath merging (MS, DN, LS, PB, PI), pp. 1543–1548.
DAC-2010-NovoLFRC #data flow #finite #precise: Exploiting finite precision information to guide data-flow mapping (DN, ML, RF, PR, FC), pp. 248–253.
DATE-2009-LiFNBPC #architecture #co-evolution #design #detection #ml #parallel #set: Algorithm-architecture co-design of soft-output ML MIMO detector for parallel application specific instruction set processors (ML, RF, DN, BB, LVdP, FC), pp. 1608–1613.
DATE-2009-NovoLBPC #finite #precise: Finite precision processing in wireless applications (DN, ML, BB, LVdP, FC), pp. 1230–1233.
DAC-2008-LiBNPC #approach #how #implementation #power management #set: How to let instruction set processor beat ASIC for low power wireless baseband implementation: a system level approach (ML, BB, DN, LVdP, FC), pp. 345–346.
DATE-2008-BougardSRNADP #array: A Coarse-Grained Array based Baseband Processor for 100Mbps+ Software Defined Radio (BB, BDS, SR, DN, OA, SD, LVdP), pp. 716–721.
DATE-2008-LiBXNPC #architecture #detection #optimisation #parallel #programmable: Optimizing Near-ML MIMO Detector for SDR Baseband on Parallel Programmable Architectures (ML, BB, WX, DN, LVdP, FC), pp. 444–449.
DATE-2008-LiNBPC #architecture #multi: Generic Multi-Phase Software-Pipelined Partial-FFT on Instruction-Level-Parallel Architectures and SDR Baseband Applications (ML, DN, BB, LVdP, FC), pp. 598–603.
DATE-2008-NovoBLPC #energy #fixpoint #refinement: Scenario-Based Fixed-point Data Format Refinement to Enable Energy-scalable Software Defined Radios (DN, BB, AL, LVdP, FC), pp. 722–727.