Travelled to:
1 × France
2 × USA
3 × Germany
Collaborated with:
H.Yang L.Thiele A.A.Jerraya S.Kang S.Kim S.Ha P.Kumar L.Schor D.Rai J.Chen F.Dumitrascu L.Pieralisi M.Bonaciu S.Yoo A.Bouchhima Y.Paviot
Talks about:
system (4) processor (2) abstract (2) thermal (2) analysi (2) critic (2) applic (2) simul (2) optim (2) multi (2)
Person: Iuliana Bacivarov
DBLP: Bacivarov:Iuliana
Contributed to:
Wrote 7 papers:
- DAC-2014-KangYKBHT #fault tolerance
- Static Mapping of Mixed-Critical Applications for Fault-Tolerant MPSoCs (SHK, HY, SK, IB, SH, LT), p. 6.
- DATE-2014-KangYKBHT #manycore #optimisation
- Reliability-aware mapping optimization of multi-core systems with mixed-criticality (SHK, HY, SK, IB, SH, LT), pp. 1–4.
- DATE-2014-KumarYBT #distributed #effectiveness #named
- COOLIP: Simple yet effective job allocation for distributed thermally-throttled processors (PK, HY, IB, LT), pp. 1–4.
- DAC-2011-ThieleSYB #analysis #embedded #multi #synthesis
- Thermal-aware system analysis and software synthesis for embedded multi-processors (LT, LS, HY, IB), pp. 268–273.
- DATE-2011-RaiYBCT #analysis #realtime #worst-case
- Worst-case temperature analysis for real-time systems (DR, HY, IB, JJC, LT), pp. 631–636.
- DATE-DF-2006-DumitrascuBPBJ #flexibility #framework #performance #platform
- Flexible MPSoC platform with fast interconnect exploration for optimal system performance for a specific application (FD, IB, LP, MB, AAJ), pp. 166–171.
- DATE-2003-YooBBPJ #abstraction #hardware #modelling #performance #simulation
- Building Fast and Accurate SW Simulation Models Based on Hardware Abstraction Layer and Simulation Environment Abstraction Layer (SY, IB, AB, YP, AAJ), pp. 10550–10555.