BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Canada
1 × Spain
12 × USA
Collaborated with:
Q.Jacobson M.H.Lipasti S.Hu J.F.Cantin S.S.Sastry K.M.Hazelwood K.J.Nesbit H.Kim T.H.Heil S.Weiss R.Canal A.González E.Rotenberg S.Palacharla N.Aggarwal S.Eyerman L.Eeckhout T.Karkhanis I.Kim A.Shankar R.Bodík S.Gopal T.N.Vijaykumar G.S.Sohi S.Bennett N.Sharma L.Bening T.A.Lane C.R.Alexander G.E.Dermer B.D.Vanderwarn S.D.Klinger C.M.Rozewski D.L.Fowler K.R.Scidmore J.Laudon
Talks about:
processor (5) control (3) specul (3) dynam (3) cach (3) use (3) superscalar (2) architectur (2) translat (2) prefetch (2)

Person: James E. Smith

DBLP DBLP: Smith:James_E=

Contributed to:

HPCA 20082008
ASPLOS 20062006
HPCA 20062006
OOPSLA 20052005
CGO 20042004
HPCA 20042004
CGO 20032003
ISMM 20002000
HPCA 19991999
HPCA 19981998
PLDI 19981998
HPCA 19971997
ASPLOS 19871987
DAC 19821982

Wrote 19 papers:

HPCA-2008-AggarwalCLS #power management
Power-Efficient DRAM Speculation (NA, JFC, MHL, JES), pp. 317–328.
Stealth prefetching (JFC, MHL, JES), pp. 274–282.
ASPLOS-2006-EyermanEKS #architecture #component #performance
A performance counter architecture for computing accurate CPI components (SE, LE, TK, JES), pp. 175–184.
HPCA-2006-HuKLS #approach #implementation #performance
An approach for implementing efficient superscalar CISC processors (SH, IK, MHL, JES), pp. 41–52.
OOPSLA-2005-ShankarSBS #analysis #runtime
Runtime specialization with optimistic heap analysis (AS, SSS, RB, JES), pp. 327–343.
Software-Controlled Operand-Gating (RC, AG, JES), pp. 125–136.
CGO-2004-HazelwoodS #optimisation
Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems (KMH, JES), pp. 89–99.
CGO-2004-HuS #using
Using Dynamic Binary Translation to Fuse Dependent Instructions (SH, JES), pp. 213–226.
HPCA-2004-NesbitS #using
Data Cache Prefetching Using a Global History Buffer (KJN, JES), pp. 96–105.
CGO-2003-KimS #architecture
Dynamic Binary Translation for Accumulator-Oriented Architectures (HSK, JES), pp. 25–35.
ISMM-2000-HeilS #concurrent #garbage collection #profiling
Concurrent Garbage Collection UsingHardware-Assisted Profiling (THH, JES), pp. 80–93.
HPCA-1999-JacobsonS #preprocessor
Instruction Pre-Processing in Trace Processors (QJ, JES), pp. 125–129.
HPCA-1999-RotenbergJS #case study #independence
A Study of Control Independence in Superscalar Processors (ER, QJ, JES), pp. 115–124.
HPCA-1998-GopalVSS #version control
Speculative Versioning Cache (SG, TNV, JES, GSS), pp. 195–205.
PLDI-1998-SastryPS #execution #float #integer
Exploiting Idle Floating-Point Resources for Integer Execution (SSS, SP, JES), pp. 118–129.
HPCA-1997-JacobsonBSS #control flow #multi
Control Flow Speculation in Multiscalar Processors (QJ, SB, NS, JES), pp. 218–229.
The ZS-1 Central Processor (JES, GED, BDV, SDK, CMR, DLF, KRS, JL), pp. 199–204.
ASPLOS-1987-WeissS #case study #compilation #pipes and filters
A Study of Scalar Compilation Techniques for Pipelined Supercomputers (SW, JES), pp. 105–109.
DAC-1982-BeningLAS #analysis #logic #network
Developments in logic network path delay analysis (LB, TAL, CRA, JES), pp. 605–615.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.