Travelled to:1 × France
2 × Germany
Collaborated with:T.Ogura T.Hoshino H.Iwasaki M.Endo K.Nitta T.Yoshitome M.Ikeda K.Ochiai T.Kondo K.Suguri T.Minami K.Nakamura M.Ogura Y.Nakajima Y.Tashiro T.Onishi
Talks about:mpeg (3) hdtv (3) chip (3) lsi (3) softwar (2) video (2) singl (2) level (2) encod (2) high (2)
Person: Jiro Naganuma
DBLP: Naganuma:Jiro
Contributed to:
200319991994Wrote 4 papers:
- DATE-2003-IwasakiNNNYONTOIE #multi #scalability
- Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level (HI, JN, KN, KN, TY, MO, YN, YT, TO, MI, ME), pp. 20002–20007.
- DATE-1999-IkedaKNSYMNO #architecture #scalability #video
- An MPEG-2 Video Encoder LSI with Scalability for HDTV based on Three-layer Cooperative Architecture (MI, TK, KN, KS, TY, TM, JN, TO), p. 44–?.
- DATE-1999-OchiaiINEO #embedded #framework #performance #video
- High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit (KO, HI, JN, ME, TO), pp. 303–308.
- EDAC-1994-NaganumaOH #algorithm #debugging #design #using #validation
- High-Level Design Validation Using Algorithmic Debugging (JN, TO, TH), pp. 474–480.