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Travelled to:
8 × USA
Collaborated with:
C.Cheng M.Hrkic G.Beraudo S.Hur P.Buch A.Jagannathan J.Li L.Liu T.Y.Lin C.Ho
Talks about:
placement (4) optim (3) rout (3) techniqu (2) approach (2) perform (2) cluster (2) replic (2) linear (2) insert (2)

Person: John Lillis

DBLP DBLP: Lillis:John

Contributed to:

DAC 20042004
DAC 20032003
DAC 20022002
DAC 20002000
DAC 19991999
DAC 19981998
DAC 19971997
DAC 19961996

Wrote 9 papers:

DAC-2004-HrkicLB #approach #logic #replication
An approach to placement-coupled logic replication (MH, JL, GB), pp. 711–716.
DAC-2003-BeraudoL #logic #optimisation #replication
Timing optimization of FPGA placements by logic replication (GB, JL), pp. 196–201.
DAC-2002-HrkicL #named #synthesis
S-Tree: a technique for buffered routing tree synthesis (MH, JL), pp. 578–583.
DAC-2000-JagannathanHL #algorithm #performance
A fast algorithm for context-aware buffer insertion (AJ, SWH, JL), pp. 368–373.
DAC-1999-HurL #clustering #framework #linear
Relaxation and Clustering in a Local Search Framework: Application to Linear Placement (SWH, JL), pp. 360–366.
Table-Lookup Methods for Improved Performance-Driven Routing (JL, PB), pp. 368–373.
DAC-1997-LillisC #multi #optimisation
Timing Optimization for Multi-Source Nets: Characterization and Optimal Repeater Insertion (JL, CKC), pp. 214–219.
DAC-1996-LiLLC #approach #clustering #linear
New Spectral Linear Placement and Clustering Approach (JL, JL, LTL, CKC), pp. 88–93.
DAC-1996-LillisCLH #performance #trade-off
New Performance Driven Routing Techniques With Explicit Area/Delay Tradeoff and Simultaneous Wire Sizing (JL, CKC, TTYL, CYH), pp. 395–400.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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