Travelled to:1 × France
1 × USA
2 × Germany
Collaborated with:R.M.Badia K.A.Vissers S.Neuendorffer S.Banerjee E.Bozorgzadeh N.Dutt L.Baldez N.Simon L.Abello J.Meyer M.Hübner L.Braun O.Sander R.M.Gil R.Stewart J.Becker
Talks about:reconfigur (3) dynam (3) architectur (2) fpgas (2) use (2) processor (1) algorithm (1) synthesi (1) interfac (1) industri (1)
Person: Juanjo Noguera
DBLP: Noguera:Juanjo
Contributed to:
2011
200720062001Wrote 5 papers:
- DATE-2011-MeyerNHBSGSB #configuration management #performance #using
- Fast Start-up for Spartan-6 FPGAs using Dynamic Partial Reconfiguration (JM, JN, MH, LB, OS, RMG, RS, JB), pp. 1542–1547.
- DATE-2011-VissersNN #interface #realtime #synthesis #tool support #using
- Building real-time HDTV applications in FPGAs using processors, AXI interfaces and high level synthesis tools (KAV, SN, JN), pp. 848–850.
- DAC-2007-BanerjeeBDN #architecture #configuration management #resource management #scheduling
- Selective Band width and Resource Management in Scheduling for Dynamically Reconfigurable Architectures (SB, EB, ND, JN), pp. 771–776.
- DATE-DF-2006-NogueraBSA #case study #industrial
- Software-friendly HW/SW co-simulation: an industrial case study (JN, LB, NS, LA), pp. 100–105.
- DATE-2001-NogueraB #algorithm #architecture #clustering #configuration management
- A HW/SW partitioning algorithm for dynamically reconfigurable architectures (JN, RMB), p. 729.