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Travelled to:
3 × France
3 × USA
5 × Germany
Collaborated with:
S.Donnay P.Wambacq Y.Rolain R.Pintelon P.Dobrovolný S.Bronckers M.Goffioul B.Debaillie J.Lataire G.V.d.Plas G.G.E.Gielen H.D.Man W.Eberle M.Engels I.Bolsens D.Linten F.Verbeyst C.Soens B.Bougard G.Lenoir F.Catthoor J.V.Driessche B.Come L.D.Locht S.Jenei A.Geis P.Nuzzo J.Ryckaert J.Craninckx J.Schoukens M.Badaroglu J.R.Phillips J.S.Roychowdhury B.Yang D.E.Long A.Demir
Talks about:
nonlinear (5) analysi (4) simul (4) model (4) high (4) substrat (3) circuit (3) effici (3) design (3) analog (3)

Person: Gerd Vandersteen

DBLP DBLP: Vandersteen:Gerd

Contributed to:

DATE 20102010
DATE 20072007
DAC 20062006
DATE 20062006
DATE 20052005
DAC 20042004
DATE v1 20042004
DATE 20032003
DATE 20022002
DATE 20012001
DAC 20002000

Wrote 16 papers:

An 11.6-19.3mW 0.375-13.6GHz CMOS frequency synthesizer with rail-to-rail operation (AG, PN, JR, YR, GV, JC), pp. 697–701.
DATE-2007-BronckersSPVR #analysis #interactive #simulation #verification
Interactive presentation: Simulation methodology and experimental verification for the analysis of substrate noise on LC-VCO’s (SB, CS, GVdP, GV, YR), pp. 1520–1525.
DATE-2007-LataireVP #design #interactive #multi #optimisation #using
Interactive presentation: Optimizing analog filter designs for minimum nonlinear distortions using multisine excitations (JL, GV, RP), pp. 267–272.
DAC-2006-DebaillieBLVC #design #energy
Energy-scalable OFDM transmitter design and control (BD, BB, GL, GV, FC), pp. 536–541.
DAC-2006-GoffioulVDDC #consistency #design #object-oriented #using
Ensuring consistency during front-end design using an object-oriented interfacing tool called NETLISP (MG, GV, JVD, BD, BC), pp. 889–892.
Systematic stability-analysis method for analog circuits (GV, SB, PD, YR), pp. 150–155.
DATE-2005-VandersteenLJRP #framework #modelling #scalability
Estimating Scalable Common-Denominator Laplace-Domain MIMO Models in an Errors-in-Variables Framework (GV, LDL, SJ, YR, RP), pp. 1076–1081.
DAC-2004-PlasBVDWDGM #simulation
High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects (GVdP, MB, GV, PD, PW, SD, GGEG, HDM), pp. 854–859.
DATE-v1-2004-VandersteenPLD #identification #linear
Extended Subspace Identification of Improper Linear Systems (GV, RP, DL, SD), pp. 454–459.
DATE-2003-DobrovolnyVWD #analysis #modelling
Analysis and White-Box Modeling of Weakly Nonlinear Time-Varying Circuits (PD, GV, PW, SD), pp. 10624–10629.
DATE-2003-EberleVWDGM #automation #behaviour #modelling #simulation
Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver (WE, GV, PW, SD, GGEG, HDM), pp. 10642–10649.
DATE-2002-GoffioulWVD #analysis #approach #architecture #using
Analysis of Nonlinearities in RF Front-End Architectures Using a Modified Volterra Series Approach (MG, PW, GV, SD), pp. 352–356.
DATE-2002-VandersteenWDV #evaluation #performance
High-Frequency Nonlinear Amplifier Model for the Efficient Evaluation of Inband Distortion Under Nonlinear Load-Pull Conditions (GV, PW, SD, FV), pp. 586–590.
DATE-2001-VandersteenWRSDEB #estimation #multi #performance
Efficient bit-error-rate estimation of multicarrier transceivers (GV, PW, YR, JS, SD, ME, IB), pp. 164–168.
CAD for RF circuits (PW, GV, JRP, JSR, WE, BY, DEL, AD), pp. 520–529.
DAC-2000-VandersteenWRDDEB #data flow #performance #simulation
A methodology for efficient high-level dataflow simulation of mixed-signal front-ends of digital telecom transceivers (GV, PW, YR, PD, SD, ME, IB), pp. 440–445.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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