Travelled to:1 × Germany
3 × USA
Collaborated with:L.He Y.Yang I.H.Jiang I.Keller V.Kariat J.Xiong
Talks about:buffer (3) consid (2) character (1) challeng (1) station (1) process (1) blockag (1) analysi (1) variat (1) insert (1)
Person: King Ho Tam
DBLP: Tam:King_Ho
Contributed to:
201520082005
2005Wrote 4 papers:
- DAC-2015-YangTJ #analysis
- Criticality-dependency-aware timing characterization and analysis (YMY, KHT, IHRJ), p. 6.
- DAC-2008-KellerTK #challenge #modelling
- Challenges in gate level modeling for delay and SI at 65nm and below (IK, KHT, VK), pp. 468–473.
- DAC-2005-TamH
- Power optimal dual-Vdd buffered tree considering buffer stations and blockages (KHT, LH), pp. 497–502.
- DATE-2005-XiongTH #process
- Buffer Insertion Considering Process Variation (JX, KHT, LH), pp. 970–975.