Travelled to:
4 × USA
Collaborated with:
E.Chiprout C.V.Kashyap C.S.Amin N.Menezes P.Bastani L.Wang F.Dartu U.Choudhury N.Hakim Y.I.Ismail
Talks about:
speedpath (2) feedback (1) statist (1) silicon (1) predict (1) multipl (1) librari (1) current (1) analysi (1) switch (1)
Person: Kip Killpack
DBLP: Killpack:Kip
Contributed to:
Wrote 4 papers:
- DAC-2008-BastaniKWC #learning #predict #set
- Speedpath prediction based on learning from a small set of examples (PB, KK, LCW, EC), pp. 217–222.
- DAC-2007-KillpackKC #feedback #metric
- Silicon Speedpath Measurement and Feedback into EDA flows (KK, CVK, EC), pp. 390–395.
- DAC-2006-AminKMKC #library #multi
- A multi-port current source model for multiple-input switching effects in CMOS library cells (CSA, CVK, NM, KK, EC), pp. 247–252.
- DAC-2005-AminMKDCHI #analysis #how #question #statistics
- Statistical static timing analysis: how simple can we get? (CSA, NM, KK, FD, UC, NH, YII), pp. 652–657.