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Travelled to:
5 × USA
Collaborated with:
E.G.Friedman C.S.Amin J.L.Neves M.Ghoneima F.Dartu F.Huebbers A.Dasdan M.H.Chowdhury S.Mei N.Menezes K.Killpack U.Choudhury N.Hakim
Talks about:
circuit (3) process (2) repeat (2) induct (2) effect (2) delay (2) rlck (2) interconnect (1) interleav (1) character (1)

Person: Yehea I. Ismail

DBLP DBLP: Ismail:Yehea_I=

Contributed to:

DAC 20062006
DAC 20052005
DAC 20032003
DAC 19991999
DAC 19981998

Wrote 9 papers:

DAC-2006-HuebbersDI #parametricity #performance #process
Computation of accurate interconnect process parameter values for performance corners under process variations (FH, AD, YII), pp. 797–800.
DAC-2005-AminID #approximate #using
Piece-wise approximations of RLCK circuit responses using moment matching (CSA, YII, FD), pp. 927–932.
DAC-2005-AminMKDCHI #analysis #how #question #statistics
Statistical static timing analysis: how simple can we get? (CSA, NM, KK, FD, UC, NH, YII), pp. 652–657.
Realizable RLCK circuit crunching (CSA, MHC, YII), pp. 226–231.
DAC-2003-GhoneimaI #bidirectional
Optimum positioning of interleaved repeaters In bidirectional buses (MG, YII), pp. 586–591.
DAC-2003-MeiAI #order #performance #reduction
Efficient model order reduction including skin effect (SM, CSA, YII), pp. 232–237.
Effects of Inductance on the Propagation Delay and Repeater Insertion in VLSI Circuits (YII, EGF), pp. 721–724.
Equivalent Elmore Delay for RLC Trees (YII, EGF, JLN), pp. 715–720.
Figures of Merit to Characterize the Importance of On-Chip Inductance (YII, EGF, JLN), pp. 560–565.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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