BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Italy
2 × Germany
3 × France
Collaborated with:
M.S.Reorda M.Violante P.Prinetto S.Gai F.Corno P.Bernardi M.Torchiano G.Cabodi M.Lajolo L.Lavagno A.Benso R.Ubar P.Cheynet B.Nicolescu R.Velazco M.Bellato D.Bortolato A.Candelori M.Ceschia A.Paccagnella P.Zambolin
Talks about:
algorithm (3) parallel (3) effect (3) level (3) evalu (3) test (3) experiment (2) approach (2) generat (2) circuit (2)

Person: Maurizio Rebaudengo

DBLP DBLP: Rebaudengo:Maurizio

Contributed to:

DATE v1 20042004
DATE 20032003
DATE 20012001
SCAM 20012001
DATE 20002000
ED&TC 19971997
SAC 19971997
PDP 19951995
PDP 19941994
PDP 19931993

Wrote 12 papers:

DATE-v1-2004-BellatoBBCCPRRVZ #memory management
Evaluating the Effects of SEUs Affecting the Configuration Memory of an SRAM-Based FPGA (MB, PB, DB, AC, MC, AP, MR, MSR, MV, PZ), pp. 584–589.
DATE-2003-BernardiRRV #approach #embedded #programmable
A P1500-Compatible Programmable BIST Approach for the Test of Embedded Flash Memories (PB, MR, MSR, MV), pp. 10720–10725.
DATE-2003-RebaudengoRV #analysis #fault #pipes and filters
An Accurate Analysis of the Effects of Soft Errors in the Instruction and Data Caches of a Pipelined Microprocessor (MR, MSR, MV), pp. 10602–10607.
DATE-2001-CheynetNVRRV #automation #evaluation #program transformation #safety
System safety through automatic high-level code transformations: an experimental evaluation (PC, BN, RV, MR, MSR, MV), pp. 297–301.
SCAM-2001-RebaudengoRVT #compilation #generative #text-to-text
A Source-to-Source Compiler for Generating Dependable Software (MR, MSR, MV, MT), pp. 35–44.
DATE-2000-LajoloRRVL #co-evolution #dependence #design #framework
Evaluating System Dependability in a Co-Design Framework (ML, MR, MSR, MV, LL), pp. 586–590.
EDTC-1997-BensoPRRU #approach #fault #graph #low level
A new approach to build a low-level malicious fault list starting from high-level description and alternative graphs (AB, PP, MR, MSR, RU), pp. 560–565.
EDTC-1997-CornoPRR #sequence #testing
New static compaction techniques of test sequences for sequential circuits (FC, PP, MR, MSR), pp. 37–43.
SAC-1997-CornoPRR #algorithm #generative #named
SAARA: a simulated annealing algorithm for test pattern generation for digital circuits (FC, PP, MR, MSR), pp. 228–232.
PDP-1995-GaiRR #algorithm #parallel #using
An improved data parallel algorithm for Boolean function manipulation using BDDs (SG, MR, MSR), pp. 33–41.
PDP-1994-CabodiGRR #architecture #parallel
A BDD Package For A Massively Parallel SIMD Architecture (GC, SG, MR, MSR), pp. 212–219.
PDP-1993-RebaudengoR #algorithm #analysis #migration #parallel #search-based
An experimental analysis of the effects of migration in parallel genetic algorithms (MR, MSR), pp. 232–238.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.