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Travelled to:
1 × Cyprus
1 × Spain
3 × Germany
4 × USA
6 × France
Collaborated with:
M.S.Reorda G.Squillero P.Prinetto D.Bonino G.Cumani M.Violante M.Rebaudengo S.Chiusano P.Camurati L.Entrena P.Pellegrino F.Pescarmona L.Farinetti A.Ferrato A.Manzone A.Pincetti E.S.Millán J.A.Espejo C.Bayol B.Soulas E.M.Rudnick R.Vietti A.Ellis G.Cabodi S.Gai L.Berrojo I.González C.López
Talks about:
test (8) techniqu (6) circuit (6) sequenti (5) generat (5) algorithm (4) automat (4) symbol (4) level (4) new (4)

Person: Fulvio Corno

DBLP DBLP: Corno:Fulvio

Contributed to:

SAC 20062006
SAC 20052005
SAC 20042004
DATE 20032003
SAC 20032003
DATE 20022002
SAC 20022002
DATE 20012001
SAC 20012001
DATE 20002000
DATE 19991999
DATE 19981998
SAC 19981998
ED&TC 19971997
SAC 19971997
DAC 19921992

Wrote 20 papers:

Domotic house gateway (PP, DB, FC), pp. 1915–1920.
SAC-2005-BoninoCP #automation #concept #learning #network
Automatic learning of text-to-concept mappings exploiting WordNet-like lexical networks (DB, FC, FP), pp. 1639–1644.
SAC-2004-BoninoCFF #framework #multi #platform #semantics
Multilingual semantic elaboration in the DOSE platform (DB, FC, LF, AF), pp. 1642–1646.
DATE-2003-CornoCRS #automation #generative
Fully Automatic Test Program Generation for Microprocessor Cores (FC, GC, MSR, GS), pp. 11006–11011.
SAC-2003-CornoCRS #automation #generative #pipes and filters
Automatic Test Program Generation for Pipeline Processors (FC, GC, MSR, GS), pp. 736–740.
DATE-2002-BerrojoGCRSEL #injection
New Techniques for Speeding-Up Fault-Injection Campaigns (LB, IG, FC, MSR, GS, LE, CL), pp. 847–852.
SAC-2002-CornoRS #algorithm
An evolutionary algorithm for reducing integrated-circuit test application time (FC, MSR, GS), pp. 608–612.
DATE-2001-CornoRSV #on the
On the test of microprocessor IP cores (FC, MSR, GS, MV), pp. 209–213.
SAC-2001-CornoRS #architecture #effectiveness #evolution
Evolving effective CA/CSTP: BIST architectures for sequential circuits (FC, MSR, GS), pp. 345–350.
DATE-2000-CornoRSMP #automation #experience #generative #industrial #validation
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience (FC, MSR, GS, AM, AP), pp. 385–389.
DATE-1999-CornoRS #algorithm #approximate #equivalence #search-based #verification
Approximate Equivalence Verification of Sequential Circuits via Genetic Algorithms (FC, MSR, GS), pp. 754–755.
DATE-1999-MillanEECC #logic #optimisation
Integrating Symbolic Techniques in ATPG-Based Sequential Logic Optimization (ESM, LE, JAE, SC, FC), pp. 516–520.
Exploiting Symbolic Techniques for Partial Scan Flip Flop Selection (FC, PP, MSR, MV), pp. 670–677.
DATE-1998-RudnickVECPR #generative #performance #testing #using
Fast Sequential Circuit Test Generation Using High-Level and Gate-Level Techniques (EMR, RV, AE, FC, PP, MSR), pp. 570–576.
SAC-1998-CornoRS #algorithm #optimisation
The selfish gene algorithm: a new evolutionary optimization strategy (FC, MSR, GS), pp. 349–355.
EDTC-1997-ChiusanoCPR #graph #hybrid #problem
Hybrid symbolic-explicit techniques for the graph coloring problem (SC, FC, PP, MSR), pp. 422–426.
EDTC-1997-CornoPRR #sequence #testing
New static compaction techniques of test sequences for sequential circuits (FC, PP, MR, MSR), pp. 37–43.
SAC-1997-CornoPRR #algorithm #generative #named
SAARA: a simulated annealing algorithm for test pattern generation for digital circuits (FC, PP, MR, MSR), pp. 228–232.
EDAC-1994-CamuratiCPBS #design #modelling #verification
System-Level Modeling and Verification: a Comprehensive Design Methodology (PC, FC, PP, CB, BS), pp. 636–640.
DAC-1992-CabodiCCGPR #traversal
A New Model for Improving symbolic Product Machine Traversal (GC, PC, FC, SG, PP, MSR), pp. 614–619.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.