Travelled to:1 × China
1 × Germany
3 × USA
Collaborated with:P.Hsiung T.Lee W.Tsai D.Zheng Y.H.Hu T.Ho C.Chang Y.Chang S.Fang K.Chang W.Feng H.Chao Y.Chen S.Tong
Talks about:system (2) rout (2) base (2) no (2) multiprocessor (1) architectur (1) reconfigur (1) multilevel (1) technolog (1) constrain (1)
Person: Sao-Jie Chen
DBLP: Chen:Sao=Jie
Contributed to:
2012
20112005
19971991Wrote 5 papers:
- DATE-2012-ChaoCTHC #configuration management #scheduling
- Congestion-aware scheduling for NoC-based reconfigurable systems (HLC, YRC, SYT, PAH, SJC), pp. 1561–1566.
- DAC-2011-TsaiZCH #bidirectional #fault tolerance #using
- A fault-tolerant NoC scheme using bidirectional channel (WCT, DYZ, SJC, YHH), pp. 918–923.
- DAC-2005-HoCCC #architecture #multi
- Multilevel full-chip routing for the X-based architecture (TYH, CFC, YWC, SJC), pp. 597–602.
- TOOLS-ASIA-1997-HsiungLC #multi #object-oriented #synthesis
- Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis (PAH, TYL, SJC), pp. 284–293.
- DAC-1991-FangCFC #multi #problem
- Constrained via Minimization with Practical Considerations for Multi-Layer VLSI/PCB Routing Problems (SCF, KEC, WSF, SJC), pp. 60–65.