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Travelled to:
1 × Germany
3 × France
9 × USA
Collaborated with:
M.R.Stan Y.Zhang D.Tarjan Y.Li J.Lach B.H.Meyer K.Sankaranarayanan Kevin Angstadt W.Weimer H.Cook D.W.Clark D.M.Brooks Z.Hu Z.Lu R.Zhang K.Wang W.Huang D.Parikh M.Boyer E.Humenay T.F.Abdelzaher N.J.George B.H.Calhoun R.J.Ribando B.C.Lee M.Barcella Matthew Casias Tommy Tracy II Elaheh Sadredini Reza Rahimi Marzieh Lenjani Mircea Stan K.Mazumdar S.Ghosh S.Velusamy
Talks about:
thermal (6) design (6) voltag (3) explor (3) manag (3) issu (3) architectur (2) procrastin (2) schedul (2) program (2)

Person: Kevin Skadron

DBLP DBLP: Skadron:Kevin

Contributed to:

DAC 20152015
DAC 20142014
DATE 20112011
DAC 20082008
DATE 20072007
DATE 20062006
HPCA 20062006
DAC 20052005
HPCA 20052005
DAC 20042004
DATE v1 20042004
HPCA 20022002
HPCA 19971997
ASPLOS 20162016
ASPLOS 20192019
ASPLOS 20202020

Wrote 20 papers:

DAC-2015-ZhangMMWSS #3d #design
A cross-layer design exploration of charge-recycled power-delivery in many-layer 3d-IC (RZ, KM, BHM, KW, KS, MRS), p. 6.
Walking Pads: Managing C4 Placement for Transient Voltage Noise Minimization (KW, BHM, RZ, MRS, KS), p. 6.
DATE-2011-MeyerGCLS #cost analysis #execution #safety #using
Reducing the cost of redundant execution in safety-critical systems using relaxed dedication (BHM, NJG, BHC, JL, KS), pp. 1249–1254.
DAC-2008-CookS #design #predict #using
Predictive design space exploration using genetically programmed response surfaces (HC, KS), pp. 960–965.
DAC-2008-HuangSSRS #design #manycore #perspective
Many-core design from a thermal perspective (WH, MRS, KS, RJR, KS), pp. 746–749.
DAC-2008-TarjanBS #named
Federation: repurposing scalar cores for out-of-order instruction issue (DT, MB, KS), pp. 772–775.
DATE-2007-HumenayTS #manycore #performance #process #symmetry
Impact of process variations on multicore performance symmetry (EH, DT, KS), pp. 1653–1658.
DATE-2006-LuZSLS #scheduling #set
Procrastinating voltage scheduling with discrete frequency sets (ZL, YZ, MRS, JL, KS), pp. 456–461.
HPCA-2006-LiLBHS #constraints #design #physics
CMP design space exploration subject to physical constraints (YL, BCL, DMB, ZH, KS), pp. 17–28.
DAC-2005-ZhangLLSS #realtime #scheduling
Optimal procrastinating voltage scheduling for hard real-time systems (YZ, ZL, JL, KS, MRS), pp. 905–908.
HPCA-2005-LiBHS #architecture #energy #performance #smt
Performance, Energy, and Thermal Considerations for SMT and CMP Architectures (YL, DMB, ZH, KS), pp. 71–82.
DAC-2004-HuangSSSGV #design #modelling
Compact thermal modeling for temperature-aware design (WH, MRS, KS, KS, SG, SV), pp. 878–883.
State-Preserving vs. Non-State-Preserving Leakage Control in Caches (YL, DP, YZ, KS, MRS, KS), pp. 22–29.
DATE-v1-2004-Skadron #architecture #hybrid
Hybrid Architectural Dynamic Thermal Management (KS), pp. 10–15.
HPCA-2002-ParikhSZBS #branch #predict
Power Issues Related to Branch Prediction (DP, KS, YZ, MB, MRS), pp. 233–244.
HPCA-2002-SkadronAS #locality #modelling
Control-Theoretic Techniques and Thermal-RC Modeling for Accurate and Localized Dynamic Thermal Management (KS, TFA, MRS), pp. 17–28.
HPCA-1997-SkadronC #design #trade-off
Design Issues and Tradeoffs for Write Buffers (KS, DWC), pp. 144–155.
ASPLOS-2016-AngstadtWS #agile #programming
RAPID Programming of Pattern-Recognition Processors (KA, WW, KS), pp. 593–605.
ASPLOS-2019-CasiasATSW #debugging #pattern matching
Debugging Support for Pattern-Matching Languages and Accelerators (MC, KA, TTI, KS, WW), pp. 1073–1086.
ASPLOS-2020-SadrediniRLSS #adaptation #automaton #named #performance
FlexAmata: A Universal and Efficient Adaption of Applications to Spatial Automata Processing Accelerators (ES, RR, ML, MS, KS), pp. 219–234.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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