Travelled to:1 × Germany
4 × USA
Collaborated with:K.Cheng J.Liou L.Wang S.Kundu Y.Jiang M.Marek-Sadowska T.M.Mak M.S.Abadir W.Lai L.Chen S.Dey
Talks about:statist (5) time (5) delay (3) base (3) diagnosi (2) analysi (2) defect (2) model (2) upon (2) test (2)
Person: Angela Krstic
DBLP: Krstic:Angela
Contributed to:
2003
2003200220011997Wrote 7 papers:
- DAC-2003-KrsticWCLM #fault #modelling #statistics
- Enhancing diagnosis resolution for delay defects based upon statistical timing and statistical fault models (AK, LCW, KTC, JJL, TMM), pp. 668–673.
- DATE-2003-KrsticWCLA #fault #modelling #statistics
- Delay Defect Diagnosis Based Upon Statistical Timing Models — The First Step (AK, LCW, KTC, JJL, MSA), pp. 10328–10335.
- DAC-2002-KrsticLCCD #design #embedded #self
- Embedded software-based self-testing for SoC design (AK, WCL, KTC, LC, SD), pp. 355–360.
- DAC-2002-LiouKWC #analysis #performance #statistics #testing #validation
- False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation (JJL, AK, LCW, KTC), pp. 566–569.
- DAC-2001-LiouCKK #analysis #performance #probability #statistics
- Fast Statistical Timing Analysis By Probabilistic Event Propagation (JJL, KTC, SK, AK), pp. 661–666.
- DAC-1997-JiangKCM #logic #optimisation #performance
- Post-Layout Logic Restructuring for Performance Optimization (YMJ, AK, KTC, MMS), pp. 662–665.
- DAC-1997-KrsticC #generative
- Vector Generation for Maximum Instantaneous Current Through Supply Lines for CMOS Circuits (AK, KTC), pp. 383–388.