Travelled to:
1 × Germany
2 × France
3 × USA
Collaborated with:
E.F.Y.Young Y.Ding M.Pan D.F.Wong W.Mak X.Zhou C.Sham S.T.W.Lai N.Viswanathan G.Nam C.J.Alpert P.Villarrubia H.Ren
Talks about:
placement (3) floorplan (3) algorithm (3) pattern (2) effici (2) optim (2) wire (2) size (2) rout (2) rectangular (1)
Person: Chris C. N. Chu
DBLP: Chu:Chris_C=_N=
Contributed to:
Wrote 8 papers:
- DAC-2015-DingCM #self
- Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography (YD, CCNC, WKM), p. 6.
- DAC-2015-DingCZ #algorithm #invariant #performance
- An efficient shift invariant rasterization algorithm for all-angle mask patterns in ILT (YD, CCNC, XZ), p. 6.
- DAC-2007-PanC #algorithm #named
- IPR: An Integrated Placement and Routing Algorithm (MP, CCNC), pp. 59–62.
- DAC-2007-ViswanathanNAVRC #named #polynomial
- RQL: Global Placement via Relaxed Quadratic Spreading and Linearization (NV, GJN, CJA, PV, HR, CCNC), pp. 453–458.
- DAC-2006-ShamYC
- Optimal cell flipping in placement and floorplanning (CWS, EFYY, CCNC), pp. 1109–1114.
- DATE-2003-LaiYC #evaluation #performance
- A New and Efficient Congestion Evaluation Model in Floorplanning: Wire Density Control with Twin Binary Trees (STWL, EFYY, CCNC), pp. 10856–10861.
- DATE-2002-ChuY #design
- Non-Rectangular Shaping and Sizing of Soft Modules in Floorplan Design (CCNC, EFYY), p. 1101.
- DATE-1998-ChuW #algorithm #polynomial
- A Polynomial Time Optimal Algorithm for Simultaneous Buffer and Wire Sizing (CCNC, DFW), pp. 479–485.