Travelled to:
2 × Germany
3 × France
Collaborated with:
Z.Khan I.Lindsay A.T.Erdogan Y.Yi M.Muir S.Khawam J.S.Thompson W.Han X.Zhao I.Nousias M.Milward S.Baloch A.Pai I.Ahmed N.Aydin F.Westall
Talks about:
reconfigur (3) implement (3) pipelin (3) system (3) architectur (2) instruct (2) schedul (2) level (2) cell (2) throughput (1)
Person: Tughrul Arslan
DBLP: Arslan:Tughrul
Contributed to:
Wrote 6 papers:
- DATE-2009-YiHZEA #architecture #manycore #scheduling
- An ILP formulation for task mapping and scheduling on multi-core architectures (YY, WH, XZ, ATE, TA), pp. 33–38.
- DATE-2008-MuirAL #automation #pipes and filters #streaming
- Automated Dynamic Throughput-constrained Structural-level Pipelining in Streaming Applications (MM, TA, IL), pp. 1358–1361.
- DATE-2007-KhanA #architecture #configuration management #implementation #pipes and filters #programmable #realtime
- Pipelined implementation of a real time programmable encoder for low density parity check code on a reconfigurable instruction cell architecture (ZK, TA), pp. 349–354.
- DATE-2007-KhanATE #algorithm #implementation #pipes and filters #sorting
- A new pipelined implementation for minimum norm sorting used in square root algorithm for MIMO-VBLAST systems (ZK, TA, JST, ATE), pp. 1569–1574.
- DATE-2006-YiNMKAL #configuration management #scheduling
- System-level scheduling on instruction cell based reconfigurable systems (YY, IN, MM, SK, TA, IL), pp. 381–386.
- DATE-v2-2004-KhawamBPAAAW #array #configuration management #implementation #mobile #performance #video
- Efficient Implementations of Mobile Video Computations on Domain-Specific Reconfigurable Arrays (SK, SB, AP, IA, NA, TA, FW), pp. 1230–1235.