BibSLEIGH
BibSLEIGH corpus
BibSLEIGH tags
BibSLEIGH bundles
BibSLEIGH people
EDIT!
CC-BY
Open Knowledge
XHTML 1.0 W3C Rec
CSS 2.1 W3C CanRec
email twitter
Travelled to:
1 × Germany
1 × Italy
1 × Turkey
2 × France
4 × USA
Collaborated with:
T.Chen W.Hu Q.Guo O.Temam Y.Wu M.Su X.Gao H.Shen Z.Du C.Wu X.Feng X.Zhang N.Sun J.Wang Y.Lv P.Wang H.Pan D.Liu S.Liu J.Zhou S.Zhou X.Zhou X.Yuan C.Wu Z.Wang J.Li P.Yew J.Huang Y.Lan Y.Guan J.Deng Y.Fang Y.Wang H.Li P.Ienne D.Novo X.Li
Talks about:
acceler (2) machin (2) verif (2) learn (2) clock (2) fast (2) dian (2) nao (2) bug (2) determinist (1)

Person: Yunji Chen

DBLP DBLP: Chen:Yunji

Facilitated 1 volumes:

ASPLOS 2017Ed

Contributed to:

ASPLOS 20152015
CGO 20152015
DATE 20152015
ICSE 20152015
ASPLOS 20142014
HPCA 20122012
DATE 20112011
DATE 20102010
HPCA 20092009

Wrote 9 papers:

ASPLOS-2015-LiuCLZZTFZC #machine learning #named
PuDianNao: A Polyvalent Machine Learning Accelerator (DFL, TC, SL, JZ, SZ, OT, XF, XZ, YC), pp. 369–381.
CGO-2015-ZhangGCCH #named #performance
HERMES: a fast cross-ISA binary translator with post-optimization (XZ, QG, YC, TC, WH), pp. 246–256.
DATE-2015-DengFDWLTINLCW #fault #hardware #network
Retraining-based timing error mitigation for hardware neural networks (JD, YF, ZD, YW, HL, OT, PI, DN, XL, YC, CW), pp. 593–596.
ICSE-v1-2015-YuanWWLYHFLCG #concurrent #debugging #named #using
ReCBuLC: Reproducing Concurrency Bugs Using Local Clocks (XY, CW, ZW, JL, PCY, JH, XF, YL, YC, YG), pp. 824–834.
ASPLOS-2014-ChenDSWWCT #named #ubiquitous
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (TC, ZD, NS, JW, CW, YC, OT), pp. 269–284.
HPCA-2012-ChenCGTWH #performance #statistics
Statistical performance comparisons of computers (TC, YC, QG, OT, YW, WH), pp. 399–410.
DATE-2011-GuoCSCWH #debugging #design #empirical #predict #verification
Empirical design bugs prediction for verification (QG, TC, HS, YC, YW, WH), pp. 161–166.
DATE-2010-SuCG #multi
A general method to make multi-clock system deterministic (MS, YC, XG), pp. 1480–1485.
HPCA-2009-ChenLHCSWP #consistency #memory management #performance #verification
Fast complete memory consistency verification (YC, YL, WH, TC, HS, PW, HP), pp. 381–392.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
Hosted as a part of SLEBOK on GitHub.