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Travelled to:
1 × Germany
1 × United Kingdom
12 × USA
3 × France
Collaborated with:
J.Cortadella A.Kondratyev D.Bañeres S.Chatterjee A.Yakovlev M.G.Oms L.Lavagno C.D.Nielsen D.Bufistov P.V.Gratz A.Gotmanov B.Grundmann S.Rotem D.Kadjo R.Ayoub J.Júlvez B.Lin P.Vanbekbergen A.Taubin V.Varshavsky E.E.Pissaloux K.S.Stevens S.M.Burns R.Ginosar M.Roncken X.Chen Z.Xu H.Kim J.Hu Ü.Y.Ogras R.Z.Ayoub S.Gupta N.Savoiu N.D.Dutt R.K.Gupta A.Nicolau T.Kam
Talks about:
circuit (6) synthesi (5) high (5) asynchron (4) system (4) elast (4) perform (3) automat (3) speed (3) microarchitectur (2)

Person: Michael Kishinevsky

DBLP DBLP: Kishinevsky:Michael

Contributed to:

DAC 20152015
DAC 20132013
VMCAI 20112011
CAV 20102010
DATE 20102010
DAC 20092009
DATE 20092009
DAC 20072007
DATE 20072007
DAC 20062006
DAC 20042004
DAC 20022002
DAC 19991999
DAC 19981998
ED&TC 19971997
DAC 19961996
DAC 19941994
PDP 19941994

Wrote 21 papers:

DAC-2015-KadjoAKG #approach #cpu #energy #gpu #mobile #performance #platform
A control-theoretic approach for energy efficient CPU-GPU subsystem in mobile platforms (DK, RA, MK, PVG), p. 6.
DAC-2013-ChenXKGHKOA #design #manycore #scalability
Dynamic voltage and frequency scaling for shared resources in multicore processor designs (XC, ZX, HK, PVG, JH, MK, ÜYO, RZA), p. 7.
VMCAI-2011-GotmanovCK #communication #verification
Verifying Deadlock-Freedom of Communication Fabrics (AG, SC, MK), pp. 214–231.
CAV-2010-ChatterjeeK #architecture #automation #communication #generative #induction #invariant #modelling
Automatic Generation of Inductive Invariants from High-Level Microarchitectural Models of Communication Fabrics (SC, MK), pp. 321–338.
DATE-2010-OmsCBK #architecture #automation #pipes and filters
Automatic microarchitectural pipelining (MGO, JC, DB, MK), pp. 961–964.
DAC-2009-BufistovCOJK #evaluation
Retiming and recycling for elastic systems with early evaluation (DB, JC, MGO, JJ, MK), pp. 288–291.
Speculation in elastic systems (MGO, JC, MK), pp. 292–295.
DATE-2009-BaneresCK #design
Variable-latency design by function speculation (DB, JC, MK), pp. 1704–1709.
DAC-2007-CortadellaK #evaluation
Synchronous Elastic Circuits with Early Evaluation and Token Counterflow (JC, MK), pp. 416–419.
Layout-aware gate duplication and buffer insertion (DB, JC, MK), pp. 1367–1372.
DAC-2006-CortadellaKG #architecture #synthesis
Synthesis of synchronous elastic architectures (JC, MK, BG), pp. 657–662.
DAC-2004-BaneresCK #paradigm #recursion
A recursive paradigm to solve Boolean relations (DB, JC, MK), pp. 416–421.
DAC-2002-GuptaSDGNKKR #coordination #performance #synthesis
Coordinated transformations for high-level synthesis of high performance microprocessor blocks (SG, NS, NDD, RKG, AN, TK, MK, SR), pp. 898–903.
DAC-1999-KondratyevCKLY #automation #optimisation #synthesis
Automatic Synthesis and Optimization of Partially Specified Asynchronous Systems (AK, JC, MK, LL, AY), pp. 110–115.
DAC-1999-StevensRBCGKR #performance
CAD Directions for High Performance Asynchronous Circuits (KSS, SR, SMB, JC, RG, MK, MR), pp. 116–121.
DAC-1998-KishinevskyCK #analysis #interface #specification #synthesis
Asynchronous Interface Specification, Analysis and Synthesis (MK, JC, AK), pp. 2–7.
EDTC-1997-CortadellaKKLY #composition #independence
Technology mapping of speed-independent circuits based on combinational decomposition and resynthesis (JC, MK, AK, LL, AY), pp. 98–105.
DAC-1996-CortadellaKKLY #encoding #synthesis #tool support
Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis (JC, MK, AK, LL, AY), pp. 63–66.
DAC-1994-KondratyevKLVY #implementation #independence
Basic Gate Implementation of Speed-Independent Circuits (AK, MK, BL, PV, AY), pp. 56–62.
DAC-1994-NielsenK #analysis #performance #simulation
Performance Analysis Based on Timing Simulation (CDN, MK), pp. 70–76.
PDP-1994-KondratyevTVKP #behaviour #diagrams #parallel
Change Diagram : A behavioural model for very speed VLSI circuit/highly parallel systems (AK, AT, VV, MK, EEP), pp. 220–226.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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