Travelled to:1 × France
1 × Germany
2 × USA
Collaborated with:L.Benini G.D.Micheli A.V.Sathanur E.Macii S.Bobba J.Zhang D.Atienza C.Seiculescu S.Murali F.Angiolini A.Macii M.Poncino N.Chandramoorthy G.Tagliavini K.M.Irick S.Advani S.A.Habsi M.Cotter J.Sampson V.Narayanan
Talks about:design (2) base (2) architectur (1) imperfect (1) heterogen (1) framework (1) algorithm (1) synthesi (1) standard (1) research (1)
Person: Antonio Pullini
DBLP: Pullini:Antonio
Contributed to:
2015
2010
20092008Wrote 5 papers:
- HPCA-2015-ChandramoorthyT #architecture
- Exploring architectural heterogeneity in intelligent vision systems (NC, GT, KMI, AP, SA, SAH, MC, JS, VN, LB), pp. 1–12.
- DAC-2010-MicheliSMBAP #network #research
- Networks on Chips: from research to products (GDM, CS, SM, LB, FA, AP), pp. 300–305.
- DATE-2009-BobbaZPAM #design #logic #standard #synthesis
- Design of compact imperfection-immune CNFET layouts for standard-cell-based logic synthesis (SB, JZ, AP, DA, GDM), pp. 616–621.
- DATE-2009-SathanurPBMM #clustering #design #variability
- Physically clustered forward body biasing for variability compensation in nanometer CMOS design (AVS, AP, LB, GDM, EM), pp. 154–159.
- DATE-2008-SathanurPBMMP #algorithm #framework #scalability
- A Scalable Algorithmic Framework for Row-Based Power-Gating (AVS, AP, LB, AM, EM, MP), pp. 379–384.