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Travelled to:
2 × France
4 × Germany
5 × USA
Collaborated with:
G.D.Micheli L.Benini C.Seiculescu D.Atienza A.Jalabert M.Coenen A.Radulescu K.Goossens F.Angiolini A.Pullini R.Braojos H.Mamaghanian A.D.Junior G.Ansaloni F.J.Rincón A.Mutapcic R.Gupta S.P.Boyd
Talks about:
chip (7) network (6) topolog (3) tool (3) no (3) methodolog (2) synthesi (2) generat (2) control (2) system (2)

Person: Srinivasan Murali

DBLP DBLP: Murali:Srinivasan

Contributed to:

DAC 20142014
DAC 20102010
DATE 20102010
DAC 20092009
DATE 20092009
DATE 20082008
DAC 20062006
DATE 20062006
DATE 20052005
DAC 20042004
DATE v2 20042004

Wrote 12 papers:

DAC-2014-BraojosMJAARM #design #monitoring #power management #smarttech
Ultra-Low Power Design of Wearable Cardiac Monitoring Systems (RB, HM, ADJ, GA, DA, FJR, SM), p. 6.
DAC-2010-MicheliSMBAP #network #research
Networks on Chips: from research to products (GDM, CS, SM, LB, FA, AP), pp. 300–305.
DATE-2010-SeiculescuMBM
A method to remove deadlocks in Networks-on-Chips with Wormhole flow control (CS, SM, LB, GDM), pp. 1625–1628.
DAC-2009-SeiculescuMBM #synthesis
NoC topology synthesis for supporting shutdown of voltage islands in SoCs (CS, SM, LB, GDM), pp. 822–825.
DATE-2009-SeiculescuMBM #3d #network #synthesis
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips (CS, SM, LB, GDM), pp. 9–14.
DATE-2008-MuraliMAGBBM #manycore #optimisation #using
Temperature Control of High-Performance Multi-core Platforms Using Convex Optimization (SM, AM, DA, RG, SPB, LB, GDM), pp. 110–115.
DAC-2006-MuraliABM #fault tolerance #multi #network
A multi-path routing strategy with guaranteed in-order packet delivery and fault-tolerance for networks on chip (SM, DA, LB, GDM), pp. 845–848.
DATE-2006-MuraliCRGM #multi #network
A methodology for mapping multiple use-cases onto networks on chips (SM, MC, AR, KG, GDM), pp. 118–123.
DATE-2005-MuraliM #design #generative
An Application-Specific Design Methodology for STbus Crossbar Generation (SM, GDM), pp. 1176–1181.
DAC-2004-MuraliM #automation #generative #named
SUNMAP: a tool for automatic topology selection and generation for NoCs (SM, GDM), pp. 914–919.
DATE-v2-2004-JalabertMBM #network
×pipesCompiler: A Tool for Instantiating Application Specific Networks on Chip (AJ, SM, LB, GDM), pp. 884–889.
DATE-v2-2004-MuraliM #architecture
Bandwidth-Constrained Mapping of Cores onto NoC Architectures (SM, GDM), pp. 896–903.

Bibliography of Software Language Engineering in Generated Hypertext (BibSLEIGH) is created and maintained by Dr. Vadim Zaytsev.
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