Travelled to:
4 × USA
Collaborated with:
J.Cong P.Zhang Y.Shi L.He P.Li M.Huang H.Huang
Talks about:
base (2) microarchitectur (1) interconnect (1) nanodevic (1) framework (1) algorithm (1) programm (1) univers (1) uniform (1) stencil (1)
Person: Bingjun Xiao
DBLP: Xiao:Bingjun
Contributed to:
Wrote 4 papers:
- DAC-2015-ZhangHXHC #compilation #framework #named
- CMOST: a system-level FPGA compilation framework (PZ, MH, BX, HH, JC), p. 6.
- DAC-2014-CongLXZ #architecture #clustering #reuse
- An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers (JC, PL, BX, PZ), p. 6.
- DAC-2013-CongX #fault #programmable
- Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance (JC, BX), p. 8.
- DAC-2010-XiaoSH #algorithm
- A universal state-of-charge algorithm for batteries (BX, YS, LH), pp. 687–692.